ASIC Verification Engineer - SystemVerilog/UVM, Power-Aware

Nutanix; Markham; On-site; CAD 105,000 - 155,000; Full time

Job summary

Qualcomm Canada ULC is seeking an engineer for pre-silicon verification of digital power IPs. You will plan tests, build SystemVerilog-UVM testbenches, and work on coverage, assertions, and formal verification.

Responsibilities include automation development to boost efficiency and learning power-aware UPF flows. Strong SystemVerilog/Verilog and RTL concepts are required, with C/C++ and scripting skills as advantages.

Qualifications

• Bachelor's degree in Science/Engineering or closely related field plus 2+ years of ASIC design/verification experience.
• Experience with SystemVerilog/Verilog and RTL concepts.
• C/C++ programming skills; scripting with Perl or Python.
• Knowledge of AMBA AXI/AHB/APB is desirable (not mandatory).

Responsibilities

• Perform pre-silicon test planning for digital power IPs and develop test benches using SystemVerilog-UVM.
• Develop automation to improve verification efficiency.
• Contribute to coverage development, assertion models, and formal verification (property checking).
• Learn and deploy power-aware UPF verification flow and methodologies.

Skills

ASIC design

Verification tools/methodology

SystemVerilog/UVM

RTL concepts

C/C++ programming

Scripting (Perl/Python)

Education

Bachelor's degree in Science/Engineering

Master's degree in CS/EE/CE

PhD in Science/Engineering

Tools

SystemVerilog

Verilog

Job description

Qualcomm Canada ULC is seeking an engineer for pre-silicon verification of digital power IPs. You will plan tests, build SystemVerilog-UVM testbenches, and work on coverage, assertions, and formal verification.

Responsibilities include automation development to boost efficiency and learning power-aware UPF flows. Strong SystemVerilog/Verilog and RTL concepts are required, with C/C++ and scripting skills as advantages.