SystemC TLM-2.0 CPU Modeling Engineer (2-Year)

Imec India Private Limited; Vlaams-Brabant; On-site; EUR 55,000 - 75,000; Full time

Benefits offered by this job

Market-appropriate salary

Fringe benefits

Development opportunities

Job summary

Imec India Private Limited is seeking a SystemC/TLM-2.0 Modeling Engineer for a temporary assignment in Leuven, Belgium. The role involves developing models for CPU cores and caches, enabling architectural evaluations before design commitments.

Join a multicultural team at a leading research center in nanotechnology, committed to technical and personal development. The ideal candidate has extensive experience in SystemC modeling and strong C++ skills.

Qualifications

• Minimum 5 years of experience developing SystemC models for CPU, SoC, or memory subsystems.
• Strong understanding of CPU and SoC architecture and interconnect protocols.
• Experience with virtual platforms for simulation.

Responsibilities

• Develop SystemC TLM-2.0 models for the CPU subsystem.
• Drive architectural exploration studies in collaboration with architects.
• Document models with clear intent and assumptions.

Skills

SystemC modeling

TLM-2.0

Modern C++ (C++11 and beyond)

CPU architecture understanding

SoC architecture knowledge

Scripting (Python, Tcl)

Tools

Synopsys Virtualizer

gem5

Job description

Imec India Private Limited is seeking a SystemC/TLM-2.0 Modeling Engineer for a temporary assignment in Leuven, Belgium. The role involves developing models for CPU cores and caches, enabling architectural evaluations before design commitments.

Join a multicultural team at a leading research center in nanotechnology, committed to technical and personal development. The ideal candidate has extensive experience in SystemC modeling and strong C++ skills.