Senior Digital ASIC Engineer – Hybrid Mechelen

Cochlear Limited

Antwerpen

Hybrid

EUR 70,000 - 110,000

Full time

7 days ago
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Benefits offered by this job

Flexible benefits
Onboarding program
Life-work balance

Job summary

Cochlear Limited in Mechelen, Belgium, is seeking a Senior Digital ASIC Engineer to lead hands-on ASIC/FPGA work across the full lifecycle, from architecture through tape-out. This senior, contributor role collaborates with hardware, software and test teams in a hybrid work environment.

The ideal candidate will bring 7+ years in digital ASIC/FPGA design, strong RTL/verification skills, and experience with SystemVerilog/UVM, clock/reset, and low-power concepts.

Qualifications

  • 7+ years of experience in digital ASIC or FPGA design, verification or integration.
  • Strong knowledge of RTL, simulation, synthesis, verification and debugging.
  • Experience with SystemVerilog/UVM, formal verification and FPGA prototyping.

Responsibilities

  • Develop and review digital ASIC requirements covering functionality, interfaces and performance.
  • Review architecture, RTL, clock/reset, CDC/RDC, low-power implementation, DFT and verification evidence.
  • Collaborate with external ASIC design/verification partners and drive issues to resolution.
  • Support tape-out readiness, silicon bring-up, characterization and debugging.
  • Work with hardware, embedded software and test teams to ensure smooth product integration.

Skills

Digital ASIC design
FPGA design
SystemVerilog/UVM
RTL
Verification
Python scripting
problem solving

Tools

Python

Job description

Cochlear Limited in Mechelen, Belgium, is seeking a Senior Digital ASIC Engineer to lead hands-on ASIC/FPGA work across the full lifecycle, from architecture through tape-out. This senior, contributor role collaborates with hardware, software and test teams in a hybrid work environment.

The ideal candidate will bring 7+ years in digital ASIC/FPGA design, strong RTL/verification skills, and experience with SystemVerilog/UVM, clock/reset, and low-power concepts.

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