Lead Digital IC Design Engineer – Mixed-Signal ASICs

ICsense; Heverlee; On-site; EUR 65,000 - 90,000; Full time

Benefits offered by this job

Team activities

Training programs

Growth potential

Learn & develop

Job summary

ICsense in Heverlee, Belgium, is seeking an experienced digital IC design engineer to lead front-end design and verification of high‑quality digital and mixed‑signal ICs. You will specify digital requirements, interact with customers and suppliers, coach junior engineers, and present at worldwide project reviews, using VHDL/Verilog/SystemVerilog, UVM, STA/LEC, UPF/CPF, DFT/ATPG, and Python or C.

Fluency in English is required and there are opportunities to grow across automotive, medical and

Qualifications

• At least four years of experience in digital IC design.
• Front-end ASIC/FPGA design in VHDL and/or Verilog/SystemVerilog.
• Front-end verification with SystemVerilog + UVM.
• Digital synthesis, LEC and STA experience.
• UPF/CPF and DFT/ATPG experience is a plus.
• Scripting in Python or C is a plus.
• Fluent in English, written and spoken.

Responsibilities

• Study, specification, design and verification of high-quality digital and mixed-signal ICs.
• Write digital specifications for mixed-signal ICs, estimate area and power.
• Technical lead for the digital content of mixed-signal ASICs including interaction with customers, suppliers and internal team.
• Lead, attend and present at project/review meetings worldwide.
• Coach junior engineers in design, verification and testing of ICs and share knowledge.
• Work with international customers to successfully complete projects.
• Self-motivated engineer able to work alone or in teams.
• Communicate effectively and deliver quality and reliability.

Skills

Digital IC design

Verilog/SystemVerilog

VHDL

UVM verification

Scripting (Python/C)

STA/LEC

DFT/ATPG

Team leadership

English fluency

Tools

Python

C

Job description

ICsense in Heverlee, Belgium, is seeking an experienced digital IC design engineer to lead front-end design and verification of high‑quality digital and mixed‑signal ICs. You will specify digital requirements, interact with customers and suppliers, coach junior engineers, and present at worldwide project reviews, using VHDL/Verilog/SystemVerilog, UVM, STA/LEC, UPF/CPF, DFT/ATPG, and Python or C.

Fluency in English is required and there are opportunities to grow across automotive, medical and