Wireless SoC Verification Engineer – AI-Driven Testing

Apple, Inc.; United States; On-site; USD 123,000 - 214,000; Full time

Benefits offered by this job

Comprehensive medical and dental

Retirement benefits

Discounted products

Employee stock programs

Tuition reimbursement

Relocation assistance

Job summary

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to verify RTL blocks, subsystems and full SOC with UVM testbenches.

You will plan tests with architects, build reusable verification environments, and drive coverage closure while collaborating with firmware and IP teams. Responsibilities include debugging, formal verification where applicable, and advancing AI-assisted verification techniques.

Qualifications

• Bachelor's degree required.
• Hands-on verification across test planning, testbench implementation, test creation and debug, and coverage closure.
• Strong SystemVerilog and Verilog skills, with solid working knowledge of UVM.
• Experience with PCIe, bus fabric/NOC, or AHB/AXI-based architectures in a UVM environment is preferred.

Responsibilities

• Partner with architects and designers early to build detailed verification plans from specifications — before RTL lands, not after.
• Develop reusable block/IP and subsystem-level UVM testbenches, and support IP integration into the SOC.
• Write directed and constrained-random tests; create and analyze coverage models and drive coverage closure.
• Debug failures, including corner cases, and manage bug tracking through resolution.
• Verify low-power design intent using UPF within your scope.
• Verify end-to-end WiFi and Bluetooth traffic flows from subsystem level up through top-level SOC integration.
• Apply formal verification where it fits — the team will help you ramp up.
• Build and improve automated regression flows and contribute to methodology in your area.
• Explore and apply AI-assisted verification techniques to improve team productivity.
• Participate in verification reviews and uphold high coding-quality standards.
• Support post-silicon bring-up as needed.

Skills

SystemVerilog

Verilog

UVM

Test planning

Debugging

SOC architecture

Digital logic design

C/C++

Education

Bachelor's degree

Tools

UPF

JasperGold

Python

Job description

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to verify RTL blocks, subsystems and full SOC with UVM testbenches.

You will plan tests with architects, build reusable verification environments, and drive coverage closure while collaborating with firmware and IP teams. Responsibilities include debugging, formal verification where applicable, and advancing AI-assisted verification techniques.