Senior SoC Verification Engineer – Wireless & PCIe UPF

Apple, Inc.; San Diego (CA); On-site; USD 175,000 - 309,000; Full time

Benefits offered by this job

Medical & dental

Retirement benefits

Discounts & services

Tuition reimbursement

Bonuses/commission

Relocation help

Job summary

Apple’s wireless SOC design verification team is hiring a Wireless SOC Design Verification Engineer. You’ll own pre-silicon RTL verification across block, subsystem and top-level SOC, building reusable testbenches and verification environments using modern, metric-driven methods.

Work with architects, designers and firmware engineers to verify power intent with UPF, verify end-to-end Wi‑Fi and Bluetooth traffic, and grow your scope from block to full SOC.

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Hands-on experience across the verification cycle: test planning, testbench implementation, test creation and debug, and coverage closure.
• Strong SystemVerilog and Verilog skills, with solid working knowledge of UVM.
• Solid problem-solving and debugging skills with constrained-random verification.
• Understanding of digital logic design, SOC architecture, and microarchitecture.

Responsibilities

• Partner with architects and designers early to build detailed verification plans from specifications — before RTL lands, not after.
• Develop reusable block/IP and subsystem-level UVM testbenches, and support IP integration into the SOC.
• Write directed and constrained-random tests; create and analyze coverage models and drive coverage closure.
• Debug failures, including corner cases, and manage bug tracking through resolution.
• Verify low-power design intent using UPF within your scope.
• Verify end-to-end WiFi and Bluetooth traffic flows from subsystem level up through top-level SOC integration.
• Apply formal verification where it fits — the team will help you ramp up.
• Build and improve automated regression flows and contribute to methodology in your area.
• Explore and apply AI-assisted verification techniques to improve team productivity.
• Participate in verification reviews and uphold high coding-quality standards.
• Support post-silicon bring-up as needed.

Skills

SystemVerilog

Verilog

UVM

test planning

testbench development

constrained-random verification

debug skills

digital logic

SOC architecture

microarchitecture

Education

BS in Electrical Engineering

Job description

Apple’s wireless SOC design verification team is hiring a Wireless SOC Design Verification Engineer. You’ll own pre-silicon RTL verification across block, subsystem and top-level SOC, building reusable testbenches and verification environments using modern, metric-driven methods.

Work with architects, designers and firmware engineers to verify power intent with UPF, verify end-to-end Wi‑Fi and Bluetooth traffic, and grow your scope from block to full SOC.