Wireless SoC Verification Engineer — Pre-Silicon Power/PCIe

Apple, Inc.; Irvine (CA); On-site; USD 123,000 - 214,000; Full time

Benefits offered by this job

Medical & dental coverage

Retirement benefits

Product discounts

Tuition reimbursement

Relocation assistance

Bonuses

Job summary

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to own a meaningful verification scope across RTL-to-SOC integrations. You will collaborate with architects, designers, and firmware engineers to build reusable testbenches and verification environments using modern, metric-driven methodologies.

You will verify power intent with UPF, develop constrained-random tests, and contribute to AI-assisted verification efforts across IPs and subsystems.

Qualifications

• Bachelor's degree in a related field.
• Experience across the verification cycle: test planning, testbench implementation, test creation and debug, and coverage closure.
• Strong SystemVerilog and Verilog skills, with solid working knowledge of UVM.
• Solid problem-solving and debugging skills with constrained-random verification.
• Understanding of digital logic design, SOC architecture, and microarchitecture.

Responsibilities

• Partner with architects and designers early to build detailed verification plans from specifications — before RTL lands, not after.
• Develop reusable block/IP and subsystem-level UVM testbenches, and support IP integration into the SOC.
• Write directed and constrained-random tests; create and analyze coverage models and drive coverage closure.
• Debug failures, including corner cases, and manage bug tracking through resolution.
• Verify low-power design intent using UPF within your scope.
• Verify end-to-end WiFi and Bluetooth traffic flows from subsystem level up through top-level SOC integration.
• Apply formal verification where it fits — the team will help you ramp up.
• Build and improve automated regression flows and contribute to methodology in your area.
• Explore and apply AI-assisted verification techniques to improve team productivity.
• Participate in verification reviews and uphold high coding-quality standards.
• Support post-silicon bring-up as needed.

Skills

SystemVerilog

Verilog

UVM

Test planning

Debugging

Constrained-random

Digital logic

SOC architecture

Education

Bachelor's degree

Tools

JasperGold

SystemVerilog Assertions

SVA

Python

Job description

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to own a meaningful verification scope across RTL-to-SOC integrations. You will collaborate with architects, designers, and firmware engineers to build reusable testbenches and verification environments using modern, metric-driven methodologies.

You will verify power intent with UPF, develop constrained-random tests, and contribute to AI-assisted verification efforts across IPs and subsystems.