Senior SoC Verification Architect

Apple Inc.; United States; On-site; USD 175,000 - 309,000; Full time

Benefits offered by this job

Medical & dental coverage

Apple stock programs

Retirement benefits

Tuition reimbursement

Relocation assistance

Job summary

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to own RTL verification across block, subsystem, and top-level SOC. You will develop reusable testbenches, build verification environments, and apply metric-driven methodologies with UPF-based low-power checks.

Engage with architects, designers, and firmware engineers to drive test planning, coverage closure, and signoff, while exploring AI-assisted verification and scalable regression strategies.

Qualifications

• BS degree in electrical engineering or related field.
• 10+ years of industry experience in verification and RTL.
• Strong SystemVerilog/Verilog with UVM experience.
• Understanding of SOC architecture and microarchitecture.

Responsibilities

• Develop reusable UVM testbenches and verification environments.
• Create and analyze coverage models; drive coverage closure.
• Verify low-power design using UPF within scope.
• Debug failures and manage bug tracking through resolution.
• Verify end-to-end WiFi/Bluetooth traffic in SOC context.

Skills

SystemVerilog

Verilog

UVM

Constrained-random verification

Debugging

SOC architecture

Education

BS in Electrical Engineering

Tools

JasperGold

Job description

Apple Inc. is seeking a Wireless SOC Design Verification Engineer to own RTL verification across block, subsystem, and top-level SOC. You will develop reusable testbenches, build verification environments, and apply metric-driven methodologies with UPF-based low-power checks.

Engage with architects, designers, and firmware engineers to drive test planning, coverage closure, and signoff, while exploring AI-assisted verification and scalable regression strategies.