Wireless SoC Pre-Silicon Emulation Architect

Apple Inc.; San Francisco (CA); On-site; USD 185,000 - 325,000; Full time

Benefits offered by this job

Comprehensive medical and dental

Retirement benefits

Stock programs

Discounted products & services

Tuition reimbursement

Job summary

Apple Inc. in the San Francisco Bay Area seeks an experienced hardware pre-silicon verification engineer focused on Palladium emulation for wireless SoCs.

You will own the framework, register maps, initialization, and system-level configuration to bring the emulated silicon up for design verification. You will work across RTL, firmware, and validation, collaborating with firmware and FPGA/emulation engineers to ensure correct HW/SW interaction.

Qualifications

• Bachelor's degree with 10 years of relevant experience.
• Strong digital design fundamentals with RTL experience (Verilog/VHDL) and knowledge of SoC architecture.
• Proficiency in Python and/or C/C++ for modeling, verification, and test benches.
• Working knowledge of wireless systems including MAC/PHY.
• Strong communication skills across cross-functional teams.

Responsibilities

• Act as the initial validation point for each Palladium emulation build, performing early smoke and sanity testing.
• Build and own the framework and infrastructure that exercises the Palladium build, including register maps and system-level configuration.
• Abstract platform bring-up and configuration into reusable infrastructure for the team.
• Sustain, extend, and maintain emulation infrastructure across silicon generations.
• Support pre-silicon emulation efforts including test development, debugging, and performance characterization.
• Bring up, test, and optimize Bluetooth and UWB silicon in the lab.

Skills

RTL experience (Verilog/VHDL)

Python/C++

SoC architecture

Wireless systems knowledge

Education

Bachelor's degree + 10 years

Master's degree + 10 years

Tools

Palladium

Job description

Apple Inc. in the San Francisco Bay Area seeks an experienced hardware pre-silicon verification engineer focused on Palladium emulation for wireless SoCs.

You will own the framework, register maps, initialization, and system-level configuration to bring the emulated silicon up for design verification. You will work across RTL, firmware, and validation, collaborating with firmware and FPGA/emulation engineers to ensure correct HW/SW interaction.