VLSI HVL Verification Engineer – Contract

Wipro Technologies; Santa Clara (CA); On-site; USD 60,000 - 140,000; Full time

Job summary

Wipro Limited is seeking a Design Verification Engineer (Contract) in California to develop VLSI verification environments and verify IP modules using HVL methods. The role emphasizes delivering robust test benches, regression testing, and timely documentation.

You'll collaborate with cross-functional teams, write verification scripts, and ensure adherence to project plans, with compensation in the $60k to $140k range depending on location and experience.

Qualifications

• VLSI HVL Verification. Experience: 3-5 Years.

Responsibilities

• Conduct verification of the module/IP functionality and provide customer support.
• Create test bench development and test case coding.
• Write scripts for the IP and perform regression testing.
• Ensure reporting & documentation for the client.

Skills

VLSI HVL Verification

Job description

Wipro Limited is seeking a Design Verification Engineer (Contract) in California to develop VLSI verification environments and verify IP modules using HVL methods. The role emphasizes delivering robust test benches, regression testing, and timely documentation.

You'll collaborate with cross-functional teams, write verification scripts, and ensure adherence to project plans, with compensation in the $60k to $140k range depending on location and experience.