Design Verification Engineer

Wipro; San Jose (IL); On-site; USD 60,000 - 149,000; Full time

Benefits offered by this job

Medical & dental benefits

Disability insurance

Paid time off (sick leave included)

Other paid and unpaid leave

Job summary

Wipro is seeking a Design Verification Engineer to join its Interface IP DV team in a fast-paced environment. You will validate architecture requirements across full hardware-software stacks for IP subsystems such as PCIe, Ethernet, and CPU interfaces, driving verification that meets the IP specifications.

The role requires hands-on SystemVerilog/UVM, testbench development, and collaboration with RTL, software, and emulation teams to ensure thorough verification and performance across scenarios.

Qualifications

• 5-12 years of design verification experience is expected.
• Hands-on with SystemVerilog/UVM and scalable testbenches.
• Experience with PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
• Ability to collaborate across RTL, software, and emulation teams.

Responsibilities

• Own end-to-end verification of one or more IP subsystems (PCIe, Ethernet, CPU, peripherals).
• Understand vendor IP configurations and interface with internal IP teams.
• Develop and maintain UVM/SystemVerilog verification environments for functional correctness and performance.
• Drive coverage closure and sign-off across corner cases and stress scenarios.

Skills

SystemVerilog/UVM

Design verification

PCIe

Ethernet

AXI/AMBA

ARM/ARC CPUs

DFT

Job description

Design Verification Engineer

Location: San Jose, CA & Austin, TX - onsite

Job Summary

We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.

Key Responsibilities

• End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors
• Understand vendor IP configurations and handle handshake with internal IP team
• Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.
• Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.
• Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.

You May Be a Good Fit If You Have

• 6 to 12 years of design verification experience
• You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.
• You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches.
• You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
• You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.
• You collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights.

Strong Candidates May Also Have Experience With

• Experience handling vendors and integration of IP/VIP’s

Mandatory Skills: VLSI Design For Testability - DFT

Experience: 5-8 Years

The expected compensation for this role ranges from $60,000 to $148,500 .

Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.

Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.

Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.

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