VLSI CAD Engineer - Synthesis & PPA Optimizer

Apple; Cupertino (CA); On-site; USD 149,000 - 195,000; Full time

Benefits offered by this job

Stock programs

Education reimbursement

Relocation assistance

Medical and dental coverage

Employee stock purchase plan

Job summary

Apple Inc. in Cupertino, CA, seeks a Senior SoC Synthesis Engineer to optimize synthesis flows and validate production-ready designs. You will work with Cadence Genus, PnR methodologies, and RTL analysis to enhance Power, Performance, and Area.

The role emphasizes automation through Python scripting, cross-functional collaboration, and ongoing feature validation for Apple silicon designs.

Qualifications

• Master's degree in Electrical Engineering or related field.
• Experience with synthesis EDA tools, CAD tool troubleshooting, and achieving timing closure.
• Proficiency in scripting for synthesis flow automation.
• Experience with SoC methodology, PnR experimentation, and design validation.
• Experience using RTL design analysis to evaluate metrics and correlations.
• Familiar with PPA optimization and post-synthesis verification.

Responsibilities

• Improve synthesis flow and resolve CAD tool issues to achieve timing closure.
• Automate synthesis workflows with scripting to streamline processes.
• Run PnR experiments and validate design features for production readiness.
• Analyze RTL against metrics and ensure post-synthesis correlation accuracy.
• Collaborate with LEQ and cross-functional teams to validate new features.

Skills

Synthesis flow automation

RTL design analysis

PPA optimization

Python scripting

EDA tool troubleshooting

SoC methodology

PnR experience

LEC validation

Education

Master's degree in Electrical Engineering

Tools

Cadence Genus

Genus scripting

Job description

Apple Inc. in Cupertino, CA, seeks a Senior SoC Synthesis Engineer to optimize synthesis flows and validate production-ready designs. You will work with Cadence Genus, PnR methodologies, and RTL analysis to enhance Power, Performance, and Area.

The role emphasizes automation through Python scripting, cross-functional collaboration, and ongoing feature validation for Apple silicon designs.