SystemC Modeling Developer

UST; Redmond (WA); On-site; USD 80,000 - 120,000; Full time

Benefits offered by this job

10 days paid vacation

6 days paid sick leave

401(k) retirement plan with employer match

Job summary

UST is seeking an experienced SystemC Modeling Developer to join the Embedded Software – Server Architecture & Performance Engineering team. The role requires the development of functional, timing, and performance models for server subsystems, with responsibilities including system-level performance modeling and validation.

Candidates should have a strong background in SystemC and C/C++, with 8+ years of relevant experience and a Bachelor's or Master's in a related field. UST offers a competitive salary between $80,000 and $120,000 annually, alongside comprehensive benefits.

Qualifications

• 8+ years of experience in SystemC/TLM modeling, pre-silicon simulation, or architectural modeling for semiconductor/server platforms.
• Strong debugging skills in complex simulation environments.
• Knowledge of pre-silicon simulation flows and virtual platform development.

Responsibilities

• Develop SystemC/TLM2.0-based functional, timing, and performance models for server subsystems.
• Perform system-level performance modeling and profiling across compute, memory, and accelerator paths.
• Validate models against RTL or hardware references to ensure functionality.

Skills

SystemC

C/C++

Computer architecture

Performance analysis

Education

Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field

Tools

Synopsys Virtualizer

Cadence VSP

QEMU

Job description

SystemC Modeling Developer

Lead II – Embedded Software – Server Architecture & Performance Engineering team

Responsibilities

• Develop SystemC/TLM2.0-based functional, timing, and performance models for server subsystems (CPU, memory, I/O, accelerators, AI engines).
• Build modular, scalable models for Compute & AI workloads and integrate them into simulation frameworks.
• Perform system‑level performance modeling, profiling, and bottleneck analysis across compute, memory, and accelerator paths.
• Support pre‑silicon BIOS, firmware, and driver enablement using virtual platforms.
• Validate models against RTL or hardware references to ensure functionality and accuracy.
• Work with simulators such as Synopsys Virtualizer, Cadence VSP, QEMU‑based frameworks, etc.

Requirements

• Strong hands‑on experience with SystemC, TLM2.0, and C/C++.
• Solid understanding of computer architecture including CPU pipelines, cache hierarchy, memory controllers, PCIe/CXL, and AI/compute subsystems.
• Experience in cycle‑accurate, timing‑accurate, or transaction‑level modeling.
• Knowledge of pre‑silicon simulation flows and virtual platform development.
• Ability to analyze performance data, interpret system behavior, and provide optimization insights.
• Strong debugging skills in complex simulation environments.
• Desired skills: modeling AI/ML accelerators, GPUs, or heterogeneous compute units; familiarity with server‑class SoC architectures (x86, ARM, RISC‑V); exposure to firmware/BIOS bring‑up using virtual models; knowledge of RTL design (SystemVerilog) or hardware emulation (optional); experience with performance tools, trace‑driven analysis, or workload modeling; understanding of high‑speed interfaces (PCIe, CXL, NVMe, Ethernet).
• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• 8+ years of experience in SystemC/TLM modeling, pre‑silicon simulation, or architectural modeling for semiconductor/server platforms.

Compensation and Location

Location: Washington (US). Compensation range: $80,000–$120,000 per year. Compensation may vary by location, role, skill set, education, and experience.

Benefits

Full‑time employees accrue a minimum of 10 days of paid vacation per year, 6 days of paid sick leave, 10 paid holidays, and are eligible for paid bereavement leave and jury duty. Employees and their dependents in the U.S. receive medical, dental, and vision insurance, a 401(k) retirement plan with employer match, basic life insurance, accidental death and disability insurance, and short‑ and long‑term disability benefits. Additional voluntary benefits may include a Health Savings Account (HSA) and a Flexible Spending Account (FSA). Benefits offerings vary in Puerto Rico.

Equal Employment Opportunity Statement

UST is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other characteristics protected by law. UST reserves the right to redefine roles and responsibilities based on organizational needs or performance.