Staff Physical Design Engineer - Low-Power PPA Expert

QUALCOMM, Inc.; San Diego (CA); Presencial; CAD 185.000 - 256.000; Jornada completa

Descripción de la vacante

Qualcomm Canada ULC is seeking an experienced ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement and document IP development for high-performance, low-power products.

You will collaborate with cross-functional teams to determine product execution paths, contribute to floorplanning, Power Planning, PPA optimization, and place & route, with emphasis on timing, power integrity and design for manufacturability.

Formación

• Bachelor’s degree in Electrical or Computer Engineering or related field.
• Master’s degree in Electrical or Computer Engineering or related field.
• PhD in Science, Engineering, or related field.

Responsabilidades

• Drive the backend process through the entire implementation flow.
• Floor-planning / Block Partitioning / Power Planning.
• Support Front-End team in PPA optimization trials.
• Leverage LLM and EDA tools to drive PPA optimization.
• Place & Route with focus on power and area optimization.
• Clock Tree Synthesis / Inspection / Optimization.
• Static timing verification and timing closure experience.
• Perform physical verification and fixing (DRC, LVS, etc.).
• EM/IR signoff and address power integrity issues.

Conocimientos

Physical design

Low-power design

SOC design

Advanced tech nodes

Educación

Bachelors in Electrical/Computer Eng

Masters in Electrical/Computer Eng

PhD in Science/Engineering

Herramientas

EDA tools

Place & Route tools

PPA tools

Descripción del empleo

Qualcomm Canada ULC is seeking an experienced ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement and document IP development for high-performance, low-power products.

You will collaborate with cross-functional teams to determine product execution paths, contribute to floorplanning, Power Planning, PPA optimization, and place & route, with emphasis on timing, power integrity and design for manufacturability.