Staff PCB Layout Engineer – High-Speed Infrastructure (Equity)

Meta; Menlo Park (CA); Sur place; USD 173 000 - 245 000; Plein temps

Résumé du poste

Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex boards for data center hardware. You will define layout architecture, support high-speed interfaces, and collaborate across engineering, manufacturing, and supply chain to ensure performance and reliability at scale.

You will lead post-layout verification, drive manufacturability reviews, and shape standards adopted across infrastructure programs, with an emphasis on SDI/PI and advanced EDA tooling.

Qualifications

• 8+ years of PCB layout experience for high-speed digital systems.
• Experience with Cadence Allegro or Mentor Xpedition.
• Define stack-up, impedance control, and constraints for high-layer-count boards.
• Lead PCB layout efforts across the full product development lifecycle.

Responsabilités

• Define PCB layout architecture and floorplanning for complex boards.
• Establish design rules, constraints, and guidelines for high-speed interfaces (PCIe, DDR, Ethernet, SerDes).
• Lead SI/PI analysis and translate results into layout decisions.
• Drive DFM reviews with contract manufacturers to meet yield and cost targets.
• Define and maintain organization-wide PCB layout standards and templates.
• Collaborate with mechanical engineers on packaging, thermal, and enclosure integration.
• Provide technical guidance to other layout engineers across programs.
• Partner with supply chain to evaluate alternative components and footprints.
• Lead post-layout verification (DRC, ERC) and pre-production bring-up support.
• Evaluate and introduce new EDA tooling and fabrication tech to improve quality and cycle time.

Connaissances

PCB layout

High-speed interfaces

SI/PI collaboration

Lifecycle leadership

Outils

Cadence Allegro

Mentor Xpedition

Description du poste

Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex boards for data center hardware. You will define layout architecture, support high-speed interfaces, and collaborate across engineering, manufacturing, and supply chain to ensure performance and reliability at scale.

You will lead post-layout verification, drive manufacturability reviews, and shape standards adopted across infrastructure programs, with an emphasis on SDI/PI and advanced EDA tooling.