Senior PCB Layout Engineer – High-Speed HDI, Hybrid

Arm Limited; Chandler (AZ); Hybrid; USD 198,000 - 268,000; Full time

Benefits offered by this job

Hybrid working

Job summary

Arm Limited is seeking a Senior PCB Layout Engineer to design layouts for high-performance compute platforms used to evaluate Arm SoCs and reference designs. You will collaborate with hardware teams to balance mechanical/thermal requirements, footprint creation, and array topologies while ensuring manufacturability.

You will work on impedance-controlled multi-layer PCBs, high-density pinouts, and robust routing strategies, with emphasis on SI/PI, HPDNs, and collaboration with fabricators.

Qualifications

• Experience designing complex multi-layer PCBs with high pin counts.
• Strong understanding of impedance control, high-speed interfaces, and power integrity.
• Experience collaborating with packaging teams and fabricators.

Responsibilities

• Develop complex, impedance-controlled multi-layer PCBs (>20 layers).
• Collaborate with chip packaging team on pinout and routing topologies.
• Provide IO count estimates for routing given stack-up and rules.
• Apply signal integrity and power integrity considerations in routing.
• Coordinate with PCB fabricators for DFM/DFT and supplier capabilities.

Skills

Impedance controlled PCBs

High-density SoCs

Signal Integrity awareness

EDA Tools Cadence OrCAD CIS

Allegro PCB

Pinout & routing advice

DFM/DFT collaboration

IPC standards knowledge

CID/CID+ (nice to have)

Schematic entry knowledge

Tools

Cadence OrCAD CIS

Allegro PCB

Job description

Arm Limited is seeking a Senior PCB Layout Engineer to design layouts for high-performance compute platforms used to evaluate Arm SoCs and reference designs. You will collaborate with hardware teams to balance mechanical/thermal requirements, footprint creation, and array topologies while ensuring manufacturability.

You will work on impedance-controlled multi-layer PCBs, high-density pinouts, and robust routing strategies, with emphasis on SI/PI, HPDNs, and collaboration with fabricators.