Staff PCB Layout Engineer: High-Speed Infrastructure

United States

On-site

USD 173,000 - 245,000

Full time

3 days ago

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Job summary

Meta seeks a Staff PCB Layout Engineer to drive the design and delivery of complex PCBs for large-scale infrastructure hardware. You will define layout architecture, establish standards, and collaborate with mechanical, electrical, and manufacturing teams to shape board-level design from concept through mass production.

You will lead SI/PI analysis, drive manufacturability reviews with vendors, and maintain organization-wide PCB layout standards across programs.

Qualifications

8+ years in PCB layout for high-speed digital systems.
8+ years with Cadence Allegro or Mentor Xpedition.
Experience defining stack-up, impedance, and design rules for high-layer-count boards.
Collaborating with signal integrity and power integrity teams to translate simulations into layout decisions.
Leading PCB layout efforts across full product development lifecycle from schematic to manufacturing release.

Responsibilities

Define PCB layout architecture and floorplanning strategies for complex, high-layer-count boards used in infrastructure hardware.
Establish and own PCB design rules, constraints, and layout guidelines for high-speed interfaces including PCIe, DDR, Ethernet, and SerDes.
Lead signal integrity and power integrity analysis in collaboration with EE teams, driving layout decisions based on simulations.