Staff PCB Layout Engineer – High-Speed Infra

Meta; Juneau (AK); On-site; USD 173,000 - 245,000; Full time

Job summary

Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex printed circuit boards for large-scale infrastructure hardware. You will define layout architecture and establish engineering standards for high-speed digital, power delivery, and signal integrity-critical designs that power Meta's data center and infrastructure platforms.

You will partner with electrical, mechanical, and manufacturing teams to shape board-level design strategy from concept through mass

Qualifications

• 8+ years of PCB layout design for high-speed digital systems.
• 8+ years of experience with Cadence Allegro, Mentor Xpedition, or equivalent.
• Experience defining PCB stack-up configurations, impedance control strategies, and design rule constraints for high-layer-count boards.
• Experience collaborating with signal integrity and power integrity teams to translate simulation results into layout implementation decisions.
• Experience leading PCB layout efforts across the full product development lifecycle from schematic capture through manufacturing release.

Responsibilities

• Define PCB layout architecture and floorplanning strategies for complex, high-layer-count boards used in infrastructure and data center hardware.
• Establish and own PCB design rules, constraints, and layout guidelines for high-speed interfaces including PCIe, DDR, Ethernet, and SerDes.
• Lead signal integrity and power integrity analysis in collaboration with electrical engineering teams, driving layout decisions based on simulation results.
• Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure yield, reliability, and cost targets are met.
• Define and maintain organization-wide PCB layout standards, templates, and best practices adopted across infrastructure hardware programs.
• Collaborate with mechanical engineers to resolve board-level packaging constraints, thermal management requirements, and enclosure integration challenges.
• Provide technical guidance to other layout engineers across multiple concurrent infrastructure hardware programs.
• Partner with supply chain and component engineering teams to evaluate and qualify alternative components and footprints.
• Lead post-layout verification activities including design rule checks, electrical rule checks, and pre-production board bring-up support.
• Evaluate and introduce new EDA tooling, layout methodologies, and fabrication technologies to improve design quality and cycle time.

Skills

Hardware Engineer

PCB Layout

Signal integrity

Tools

Cadence Allegro

Mentor Xpedition

Job description

Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex printed circuit boards for large-scale infrastructure hardware. You will define layout architecture and establish engineering standards for high-speed digital, power delivery, and signal integrity-critical designs that power Meta's data center and infrastructure platforms.

You will partner with electrical, mechanical, and manufacturing teams to shape board-level design strategy from concept through mass