Staff PCB Layout Engineer – High-Speed Data Center (Equity)

Meta; Carson City (NV); On-site; USD 173,000 - 245,000; Full time

Job summary

Meta is seeking a Staff PCB Layout Engineer to lead the design and delivery of complex boards for data center infrastructure. You will define layout architecture and standards, collaborating with electrical, mechanical, and manufacturing teams from concept to mass production.

The role focuses on high-speed digital, power delivery, and signal integrity, requiring extensive experience with DDR, PCIe, SerDes, and advanced EDA tools.

Qualifications

• 8+ years of PCB layout experience for high-speed digital systems (DDR, PCIe, SerDes).
• 8+ years using Cadence Allegro or Mentor Xpedition for layout.
• Experience defining stack-up, impedance control, and design rules for high-layer-count boards.
• Experience translating SI/PI results into layout decisions.
• Experience leading PCB layout across the full product lifecycle from schematic to manufacturing.

Responsibilities

• Define PCB layout architecture and floorplanning for complex high-layer-count boards.
• Establish and own design rules and guidelines for PCIe, DDR, Ethernet, and SerDes interfaces.
• Lead SI and PI analyses and drive layout decisions from simulation results.
• Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators.
• Collaborate with mechanical engineers on packaging constraints and thermal management.
• Provide guidance to other layout engineers across multiple programs.
• Evaluate and introduce new EDA tooling and fabrication technologies.

Skills

PCB Layout

Signal Integrity

Power Integrity

Layout Architecture

High-speed Interfaces

Tools

Cadence Allegro

Mentor Xpedition

Job description

Meta is seeking a Staff PCB Layout Engineer to lead the design and delivery of complex boards for data center infrastructure. You will define layout architecture and standards, collaborating with electrical, mechanical, and manufacturing teams from concept to mass production.

The role focuses on high-speed digital, power delivery, and signal integrity, requiring extensive experience with DDR, PCIe, SerDes, and advanced EDA tools.