Staff Modeling Architect — Photonics AI Hardware

Neurophos; Austin, Sunnyvale (TX, CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Health plan premiums covered

Unlimited PTO

401(k) matching

Stock options

Voluntary benefits

Job summary

Neurophos is seeking a staff-level modeling architect to bridge production models and performance/energy numbers for AI compute hardware. You will co-design workloads with software and hardware teams, bind ML workloads to the runtime, and guide tiling, ISA, memory hierarchy, and multi-chip mapping.

You will mentor engineers shaping models in this domain. The role expects 8+ years in hardware/performance modeling, strong C++/Python skills, and a track record delivering influential models.

Qualifications

• BS, MS, or PhD in Computer Engineering, Electrical Engineering, Computer Science, or equivalent practical experience.
• 8+ years of experience in hardware modeling, functional modeling, performance modeling, or accelerator performance analysis.
• Track record of delivering a model or study relied upon by other teams.
• Ability to select appropriate modeling methods among roofline, limiter, analytical models, or RTL simulation.

Responsibilities

• Bring up inference workloads as they ship, including dense and MoE transformers, attention and KV cache, expert routing, quantization, and hybrid/SSM models.
• Bind Hugging Face and PyTorch workloads to the programming model and runtime, then validate against the functional model.
• Co-design tiling, ISA, SRAM/HBM hierarchy, NoC traffic, and multi-chip mapping across pipelines and tensor/sequence parallelism.
• Run roofline and design-space exploration to align compiler and hardware perspectives.
• Develop Python energy and latency models using NumPy, Pandas, and Matplotlib.
• Implement bit-accurate C++ functional models of optical GEMM and related hardware blocks.
• Contribute to the C++ event-driven simulation kernel, including coroutines and traces.
• Create cycle-accurate PPA models and sync with RTL via Verilator/SystemVerilog.
• Maintain consistent numbers across models and RTL, document discrepancies.
• Set the modeling methodology and prioritize what is modeled at each fidelity.

Skills

Hardware modeling

C++17+

Python

SystemC/gem5

RTL/simulation tooling

LLM workloads

Performance modeling

Education

BS/MS/PhD in CS/EE or equivalent

Tools

SystemC

gem5

Verilator

SystemVerilog

PyTorch/Hugging Face

Job description

Neurophos is seeking a staff-level modeling architect to bridge production models and performance/energy numbers for AI compute hardware. You will co-design workloads with software and hardware teams, bind ML workloads to the runtime, and guide tiling, ISA, memory hierarchy, and multi-chip mapping.

You will mentor engineers shaping models in this domain. The role expects 8+ years in hardware/performance modeling, strong C++/Python skills, and a track record delivering influential models.