Staff IC Verification Engineer

Broadcom, Inc.

Fort Collins (CO)

On-site

USD 110,000 - 176,000

Full time

8 days ago

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Benefits offered by this job

Discretionary annual bonus
Equity grants
401(k) with company matching

Job summary

The ASIC Product Division in Broadcom is seeking qualified individuals to contribute to SoC and IP development programs. You will join a high‑performance design team delivering state‑of‑the-art subsystems for AI and storage chips.

Responsibilities include building verification environments with SystemVerilog and UVM, designing verification classes, implementing coverage and assertions, and developing random test cases.

Qualifications

  • Bachelor's or Master’s degree in EE, CE, or CS with 6+ years of related experience.
  • Expertise in Verilog/SystemVerilog and HDL verification techniques.
  • Experience with constrained/random verification environments and UVM, OVM, or VMM.
  • Strong debugging and performance analysis using HDL simulators.
  • Proficient in C++/Java and object-oriented design.

Responsibilities

  • Verification environment development using SystemVerilog and UVM.
  • Design of verification classes: UVM sequences, agents, scoreboards, and models.
  • Implement coverage and assertions in SystemVerilog.
  • Develop random and directed test cases to close coverage.
  • Analyze and debug simulation failures and coverage results.

Skills

Verilog/SystemVerilog
UVM/OVM/VMM
HDL simulators debugging
OO languages (C++, Java)
Communication skills
Leadership skills
Independent contributor

Education

Bachelor/Master in EE/CE/CS

Job description

Job Description:

The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high-performance design team responsible for state-of-the-art subsystem development to meet customer requirements for AI and storage chips.

Responsibilities Include:
  • Verification environment development using modern verification techniques (System Verilog and UVM)
  • Designing verification classes such as UVM sequences, agents, scoreboards, and behavioral models
  • Implementing coverage and assertions using System Verilog
  • Developing random & directed test cases to close coverage
  • Analyzing and debugging simulation failures, as well as analyzing coverage results.
  • Candidate must be a highly productive individual contributor with demonstrated technical capability in system and sub-block level verification.
Skills & Experience:
  • Excellent communication and interpersonal skills
  • Experience communicating in a matrix organization to achieve common goals
  • Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog
  • Experience in designing in constrained random environments using UVM, OVM, or VMM
  • Experience running and debugging using HDL simulators
  • Demonstrated familiarity with OOP languages (C++, Java, etc.) and Proficient with OOP techniques
  • Demonstrated critical thinking to conceive and develop innovative solutions to solve complex engineering problems
  • Demonstrated leadership skills
  • Act independently to determine methods and procedures on new or special assignments
  • Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support
Education:
  • Bachelors in EE, CE, or CS and 8+ years of related experience; or Masters degree in EE, CE, or CS and 6+ years of related experience
Compensation and Benefits

The annual base salary range for this position is USD 109,700.00 To USD 175,500.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Staff IC Verification Engineer
Staff IC Verification Engineer

Broadcom • Fort Collins (CO)

On-site
USD 110,000 - 176,000
Design Verification Engineer
Design Verification Engineer

Broadcom, Inc. • San Jose (CA)

On-site
USD 143,800 - 230,000
Medical, dental, and vision plans
401(k) with company matching
Employee Stock Purchase Program (ESPP)
+1
ASIC Verification Engineer
ASIC Verification Engineer

Broadcom Inc. • Irvine (CA)

On-site
USD 101,000 - 162,000
Medical plans
Dental plans
Vision plans
+6
ASIC Verification Engineer
ASIC Verification Engineer

8413 LSI Corporation • Fort Collins (CO)

On-site
USD 110,000 - 176,000
Discretionary annual bonus
Equity grant
Annual equity awards
+3
Design Verification Engineer
Design Verification Engineer

Broadcom • San Jose (CA)

On-site
USD 150,000 - 210,000
Equity grants
Annual bonus
401(k) with company match
+1
Design Verification Engineer
Design Verification Engineer

Broadcom Inc. • Broomfield (CO)

On-site
USD 108,000 - 172,800
Medical, dental and vision plans
401(K) participation with company matching
Employee Stock Purchase Program (ESPP)
+1
R&D Engineer IC Design 5
R&D Engineer IC Design 5

Broadcom Inc. • Wayne (CA)

On-site
USD 144,000 - 230,000
Discretionary annual bonus
Equity grants
Comprehensive benefits (medical, dent,
Staff IC Verification Engineer
Staff IC Verification Engineer

8413 LSI Corporation • Fort Collins (CO)

On-site
USD 110,000 - 176,000
Medical plan
Dental plan
Vision plan
+5
IC Verification Engineer
IC Verification Engineer

Broadcom, Inc. • Wayne (CA)

On-site
USD 144,000 - 230,000
Medical coverage
401K matching
ESPP
+4
SoC Integration and Design Engineer
SoC Integration and Design Engineer

Broadcom Inc. • Mendota Heights (MN)

On-site
USD 110,000 - 176,000
Discretionary annual bonus
Equity grant
Annual equity awards
+5