Staff DRAM Design Engineer: Memory Architecture Lead

Micron Technology, Inc.; United States; On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Benefits guide available

Competitive retirement programs

Job summary

Micron Technology, Inc. in the United States is seeking a Staff DRAM Design Engineer to shape memory architectures and circuit innovations that impact performance, power, and reliability.

This is a hands-on role from concept to silicon validation, collaborating with cross-functional teams. You will lead design and optimization of DRAM circuits, analyze simulations with SPICE and Verilog, and evaluate architectural trade-offs for manufacturability.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 2+ years of circuit design or 4+ years of product engineering.
• Strong understanding of analog and digital circuit fundamentals and debugging.
• Experience with circuit simulation tools and methodologies.
• Knowledge of CMOS behavior, timing, and performance optimization.

Responsibilities

• Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic.
• Perform and analyze circuit simulations using tools such as SPICE and Verilog.
• Evaluate architectural trade-offs impacting power, performance, and die size.
• Integrate layout parasitics into simulations and drive design for manufacturability.
• Define validation strategies including test chip development and silicon bring-up.

Skills

Circuit design

Circuit simulation

CMOS timing

Analog & digital

Education

Bachelor's degree in Electrical Engineering or related field

Tools

SPICE

Verilog

Job description

Micron Technology, Inc. in the United States is seeking a Staff DRAM Design Engineer to shape memory architectures and circuit innovations that impact performance, power, and reliability.

This is a hands-on role from concept to silicon validation, collaborating with cross-functional teams. You will lead design and optimization of DRAM circuits, analyze simulations with SPICE and Verilog, and evaluate architectural trade-offs for manufacturability.