Staff Design Engineer - Analog & Mixed-Signal ICs

monolithicpower; San Jose (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Monolithic Power Systems, Inc. is seeking a staff-level design engineer in San Jose, CA to drive block-level analog circuit design, simulation, and top-level integration. You will contribute to robust mixed-signal ICs through careful schematic capture and cross-disciplinary collaboration.

Responsibilities include layout verification, post-layout extraction, and AMS simulations, while reducing design risk and ensuring high-performance analog and mixed-signal implementations.

Qualifications

• Minimum MSEE and 5 years of experience in analog and mixed-signal integrated circuit design.
• Experience in ADC design: SAR/Delta-Sigma/Counting/Pipelined.
• Low-Noise Amplifier/Op-amp/RF design experience is a plus.
• Solid understanding of transistor-level analog and digital circuit theory.
• Proficiency with layout design and extraction increases reliability.
• Familiarity with digital design flow and analog/digital interfaces is beneficial.
• Experience with AMS (mixed-mode system-level) simulations is a plus.
• Strong written and verbal communication skills and cross-disciplinary teamwork.

Responsibilities

• Perform block-level analog circuit design and simulation.
• Schematic capture and layout verification with post-layout extraction and simulation.
• Top-level integration and verification across analog, digital, and system blocks.

Skills

Analog circuit design

Mixed-signal design

Schematic capture

Layout verification

Post-layout extraction

AMS simulation

Interfaces (analog/digital)

Education

MSEE

Tools

Cadence

Mentor

Job description

Monolithic Power Systems, Inc. is seeking a staff-level design engineer in San Jose, CA to drive block-level analog circuit design, simulation, and top-level integration. You will contribute to robust mixed-signal ICs through careful schematic capture and cross-disciplinary collaboration.

Responsibilities include layout verification, post-layout extraction, and AMS simulations, while reducing design risk and ensuring high-performance analog and mixed-signal implementations.