Lead Analog/Mixed-Signal IC Engineer - Equity & Bonus

SiTime Corp.; Santa Clara (CA); Sur place; USD 180 000 - 260 000; Plein temps

Avantages offerts par ce poste

401k plan

Health and wellness benefits

Equity grants

Quarterly bonus

Résumé du poste

SiTime is seeking a senior engineer to lead analog and mixed-signal IC design efforts in Santa Clara. You will own the top-level schematic, oversee block designers, and drive design reviews across cross-functional teams to enable rapid silicon bring-up and production release.

The role demands deep AMS expertise, hands-on verification, and strong communication across dispersed teams. You will develop CMOS/BiCMOS architectures, simulate complex circuits, and guide layout and post-layout

Qualifications

• Must have master’s degree or PhD with substantial relevant experience in electrical engineering.
• Track record of taking analog/mixed-signal parts to high-volume production.
• Experience in circuit architecture development and writing detailed block-level specs.

Responsabilités

• Lead development of analog/mixed-signal ICs and own the top level schematic.
• Supervise and review block designer work and lead design reviews.
• Collaborate with cross-functional teams to architect the chip for DFT and fast silicon bring-up.
• Coordinate bench validation, qualification and final test development.
• Lead comprehensive design reviews and supervise layout activities.
• Ensure DFT/DFM features and rapid production release with Verification teams.

Connaissances

Analog/mixed-signal design

Circuit architecture development

Top-level schematic & simulations

AMS verification

Cross-functional collaboration

Independent problem solving

Communication across dispersed teams

Formation

M.Sc. in Electrical Engineering

Ph.D. in Electrical Engineering

Outils

Cadence Virtuoso

Spectre

ADE

Mixed-mode AMS tools

Layout XL

Description du poste

SiTime is seeking a senior engineer to lead analog and mixed-signal IC design efforts in Santa Clara. You will own the top-level schematic, oversee block designers, and drive design reviews across cross-functional teams to enable rapid silicon bring-up and production release.

The role demands deep AMS expertise, hands-on verification, and strong communication across dispersed teams. You will develop CMOS/BiCMOS architectures, simulate complex circuits, and guide layout and post-layout