Staff ASIC Design Engineer

Nokia Corporation; Sunnyvale (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Nokia in Sunnyvale, CA is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to drive next-generation ICs and participate in all R&D phases from concept to production ramp.

You will work within the Optical Networks division to deliver >100Gbaud ICs, collaborate with verification, CAD, product and test teams, and contribute to elegant analog solutions with SiGe BiCMOS/CMOS processes.

Qualifications

• BS in Electrical Engineering with 5+ years of experience in high-speed analog IC design.
• Experience with SiGe BiCMOS or CMOS processes.
• Knowledge of RF wafer probing and high-frequency test techniques.
• Familiarity with VerilogA and CAD scripting (Python, shell).

Responsibilities

• Develop & bring up >100Gbaud ICs for future products.
• Oversee design, layout and bring-up activities.
• Collaborate with verification, CAD, product and test teams on DVT plans and characterization.

Skills

High-speed analog IC design

SiGe BiCMOS / CMOS

RF wafer probing

VerilogA

CAD scripting (Python, shell)

Team collaboration

Education

BS in Electrical Engineering

MS preferred

PhD desirable

Tools

VerilogA CAD tools

Job description

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise

Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we've united two industry leaders to create an optical networking powerhouse-combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Nokia is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to create innovative products in a fast-paced and collaborative team environment. The engineer will be hands-on with all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test and production ramp-up. As a member of a vertically-integrated team, the engineer will be directly supporting system level customers and will be closely working with product, operations and reliability teams. The self-motivated engineer must be able to anticipate problems and devise effective solutions. NION2026

• Responsible for developing > 100Gbaud ICs for future generation products
• In charge of many aspects of IC product development, such as design, layout, and bring-up.
• Work closely with verification, CAD, product and test engineering teams to devise and conduct DVT plans and characterization.

Minimum Experience Requirements:

• Experience with High-speed analog IC designs with SiGe BiCMOS or CMOS
• Knowledge of transmission lines and other high-frequency passive structures
• A good understanding of device physics and impact on analog circuits and techniques to improve performance.
• Experience with RF wafer probing, lab equipment and evaluation of high-speed analog ICs
• Familiarity with VerilogA and CAD scripting languages (Skill, python, shell scripts) would be an asset.
• Must be a team player with good verbal and written communication skills

Education Requirements:

• BS 5+ years - MS/PhD preferred
• MS 3+ years
• PhD