Staff Analog Mixed-Signal Design Engineer

Nokia Corporation; San Jose (CA); Sur place; USD 180 000 - 260 000; Plein temps

Résumé du poste

Nokia Corporation in San Jose, CA seeks a Principal Design Engineer to design, analyze, and bring high-speed analog/mixed-signal circuits to production using advanced CMOS FinFET technologies. You will optimize ADCs, DACs, PLLs, and related IPs, while drafting floor plans and guiding layout teams to achieve performance goals.

The role requires deep knowledge of Cadence tools, device physics, and Verilog-AMS modeling, with a track record of delivering complex analog/mixed-signal designs to

Qualifications

• MS in E.E. with 12+ years' experience or Ph.D. in E.E. with 8+ years' experience
• Experience designing analog/mixed-signal IPs or chips in deep submicron CMOS technologies
• Experience bringing high-speed ADC, DAC, and PLL to production
• Solid understanding of CMOS analog/mixed signal design methodologies and device physics
• Ability to perform behavioral modeling with Verilog-A/Verilog-AMS
• Collaborative with cross-functional teams in fast-paced environments

Responsabilités

• Design, implement, and simulate high-speed analog circuits including ADCs, DACs
• Create layout floor plans and supervise layout engineers; hands-on in drawing layout if needed
• Evaluate topology trade-offs to meet power/area/linearity/bandwidth targets
• Develop analog test plans and characterize products with PE/TE teams
• Support adherence to design methodologies and release flows

Connaissances

Analog/mixed-signal design

CMOS device physics

CMOS design methodologies

Verilog-A / Verilog-AMS

Cross-functional collaboration

Formation

MS in EE (12+ years)

PhD in EE (8+ years)

Outils

Cadence Virtuoso

Spectre

Incisive

Calibre

EMX

Totem EM/IR

Description du poste

The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed-signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design to production. Engaging in high-speed analog circuit design gives you the chance to create the technical differentiation that will allow Infinera to hold market leadership. By building cutting-edge circuitry, we will together revolutionize the era of efficient high-speed transmission.

• Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs;
• Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary;
• Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc.
• Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality;
• Need to support and comply with the team's design methodologies and release flows.

Mandatory Knowledge/Skills/Abilities:

• Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
• Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies.
• Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production.
• Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis;
• Must have a good understanding of device physics and the impacts of layout effects;
• Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS;
• Collaborative with other local or remote team members in a fast-paced professional environment.

Preferred Knowledge/Skill/Abilities:

• Fluent in verbal and written communications;
• Independently resolves issues and conquer design challenges;
• Self-motivated and detail-oriented;
• Has the knowledge of (optical) communication theories and Matlab coding.

Education and Experience Requirements:

• Principal Design Engineer: M.S. in E.E. with 12+ years' experience, or Ph.D. in E.E. with 8+ years' experience

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