STA Engineer

Apple, Inc.; Beaverton (OR); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple, Inc. is seeking an ASIC STA Engineer in Beaverton, Oregon to own full chip and block timing closure and develop timing methodologies for high-end mobile SOCs.

You will collaborate with multi-functional teams to resolve complex timing issues, generate timing constraints, and ensure high-quality IP deliverables in deep sub-micron processes. A strong foundation in digital design and scripting is essential.

Qualifications

• Bachelor's degree + 3 years of experience in ASIC STA or timing closure.
• Strong fundamentals in Digital design and timing concepts.
• Proficient in scripting languages (TCL and Perl).
• Familiarity with ASIC timing concepts and STA tools such as Primetime.
• Experience with front-end tools and methodologies (Synthesis, logic checks).
• Familiarity with Constraint analysis and debug tools (GCA) is desirable.
• Knowledge of timing corners, variations and signal integrity issues; good cross-team communication.

Responsibilities

• Own full-chip and block-level timing closure across the SOC design lifecycle.
• Generate block and full-chip timing constraints and verification methodologies.
• Collaborate with multiple SOC teams to resolve timing issues in Apple SoCs.
• Work with deep-sub-micron technologies for high-end mobile applications.

Skills

Digital design fundamentals

Self-starter

Scripting (TCL, Perl)

ASIC design timing concepts

Constraint analysis and debugging

Education

Bachelor's degree

Tools

Primetime

Galaxy Constraint Analyzer (GCA)

Synthesis tools

Logic equivalence checks

Job description

Imagine what you could do here at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers.Come join our team and be responsible for leading edge IP development and coordinating with multiple SOC teams. In this role, you will work collaboratively with various SOC teams to execute design and integration tasks for the high quality IP deliverables.

Description

As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Develop and maintain methodology and flows related to timing verification and closure. Generation of block and full chip timing constraints. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. Work closely with various multi-functional teams on resolving complex timing issues for major building blocks of complex SoCs.

Minimum Qualifications

• Bachelors Degree + 3 Years of Experience.

Preferred Qualifications

• Strong fundamentals in the area of Digital design
• Self-starter and highly motivated
• Proficient in scripting languages (TCL and Perl)
• Familiarity with ASIC design timing concepts
• Exposure in STA tools (Primetime) is a plus
• Familiarity with front end tools and methodologies such as Synthesis, Logic equivalence checks
• Familiarity in Constraint analysis and debug, using industry standard tools such as Synopsys GCA (Galaxy Constraint Analyzer) is desirable but not required
• Knowledge of timing corners/modes, process variations and signal integrity related issues is a plus
• Ability to commnicate optimally across all internal groups

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants