Timing Design Engineer

Apple Inc.; San Diego (CA); On-site; USD 122,700 - 214,300; Full time

Job summary

Apple Inc. is seeking an ASIC STA Engineer to drive timing sign‑off and flow development across the SoC. You will own IP and block level timing constraints from synthesis to sign‑off, interfacing with RTL, CAD, and Physical Design to achieve timely closure.

The role emphasizes expertise in timing constraints, attention to variations, and strong collaboration across diverse groups at Apple.

Qualifications

• Bachelors of Science in Electrical Engineering.
• Experience with ASIC timing constraints and timing closure preferred.

Responsibilities

• Perform timing sign‑off and develop sign‑off flow.
• Own IP and block level timing constraints for Synthesis to sign‑off.
• Collaborate with RTL to understand design intent and clock structure.
• Work with CAD to develop timing flow and constraints.
• Coordinate with Physical Design to close timing.
• Propose ideas to verify timing constraints and improve flows.
• Innovate timing constraints and flows to enable timing closure.

Skills

ASIC timing

Timing closure

Primetime

Tcl scripting

Perl scripting

Synthesis

DFT

Clock structure

Communication

Education

Bachelor's degree in Electrical Engineering

Job description

Description

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign‑off, STA and sign‑off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign‑off to achieve sign‑off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign‑off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis.

Minimum Qualifications

• Bachelors of Science in Electrical Engineering.

Preferred Qualifications

• Proven knowledge of the ASIC design timing closure flow and methodology.
• 2+ years of experience in writing ASIC timing constraints and timing closure.
• Expertise in STA tools (Primetime) and flow, knowledge of timing corners/modes, process variations and signal integrity related issues.
• Hands on experience in timing/SDC constraints generation and management.
• Proficient in scripting languages (Tcl and Perl).
• Familiarity with synthesis, DFT and backend related methodology and tools.
• Strong communication skills are a pre‑requisite – you will be collaborating with many diverse groups at Apple.
• The ideal candidate will be a self‑starter and highly motivated to be successful at Apple.

Compensation and Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $122,700 and $214,300, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including: comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Equal Opportunity

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Accessibility

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace.

Learn about reasonable accommodations for job applicants.