SRAM/ROM Circuit Design Engineer

NXP Semiconductors; Austin (TX); On-site; USD 130,000 - 170,000; Full time

Job summary

NXP Semiconductors in Austin is seeking an experienced memory circuit design engineer to advance our SRAM and ROM memory compiler designs. You will collaborate with global memory teams to meet performance, power, and area targets, and to integrate designs into verification flows.

The role requires 8+ years in SRAM memory design, with 5nm+ process exposure, strong Cadence Virtuoso skills, and scripting ability in Perl/Tcl/Python. A Master’s is preferred and office-based collaboration is expected.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering (Master’s preferred).
• 8+ years in SRAM memory circuit design, with 5nm+ process experience.
• Strong familiarity with Cadence Virtuoso and other EDA tools.
• Scripting skills in Perl, Tcl, or Python required.
• Analytical, creative problem-solving abilities.

Responsibilities

• Implement CMOS memory circuit designs to meet performance, power, and area targets.
• Generate, execute, and evaluate simulation data and test benches against benchmarks.
• Collaborate with layout teams to optimize area and performance of leaf cells.
• Work with CAD teams to integrate designs into characterization and verification flows.
• Coordinate with frontend modeling teams to ensure design fidelity with behavioral models.
• Leverage GenAI tools to improve design methodologies.

Skills

Scripting languages

Analytical thinking

Creative mindset

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Master’s degree preferred

Tools

Cadence Virtuoso

EDA tools

Job description

NXP’s Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal memory compiler designs.

Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide differentiating SRAM/ROM memory compiler solutions to NXP SoC design teams across multiple business lines- your work will have real impact for our design teams and, through them, our end products and end customers.

Job Summary:

• Implement design of CMOS memory circuits to meet memory compiler performance, power, and area requirements, including periphery circuits to support functional safety and scan functionality.
• Generate, execute, and evaluate simulation characterization measurements and simulation test benches, and compare vs. performance targets/benchmarks.
• Engage with layout teams on implementation of compiler leaf cells based on designs to improve area and performance.
• Work closely with CAD teams on implementation of new designs into our characterization, verification, and regression flows.
• Align with modeling/verification team to ensure consistency of designs with frontend models (behavioral/ATPG/emulation).
• Collaborate effectively across global memory teams to help ensure common methodologies and best practices.
• Leverage internally supported LLM/GenAI tools and EDA vendor GenAI solutions to implement efficiencies in design methodologies.

Job Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline. (Master’s degree is preferred).
• 8+ years of industry experience (6+ with Master’s degree) in SRAM memory circuit design, including some design experience with advanced CMOS foundry technologies at 5nm and beyond.
• Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
• Familiarity with automotive design rules and memory design requirements is a plus.
• Good knowledge of scripting languages such as Perl, tcl, or Python is a must.
• Creative mindset, with strong analytical and problem-solving skills.

Job location:

• The position will be based at the NXP offices in Austin, Texas. Team members are expected to work in office at least 3 days/week.