Sr Solutions Engineer-FPGA/PCIe

National MS Society; San Jose (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

AMD in San Jose is seeking a hardware/FPGA design engineer to architect and implement high-performance ASIC/FPGA acceleration solutions, collaborating with architects and firmware teams. You will develop RTL in SystemVerilog/Verilog, verify complex logic, and lead pre-silicon verification and post-silicon bring-up across PCIe, CXL, Ethernet, and DDR5/6.

This role requires strong problem-solving, system-level validation, and scripting with Python/Tcl; you will work with global teams in a

Qualifications

• Hands-on experience with ASIC/FPGA design
• Expertise in SystemVerilog/Verilog, synchronous design and timing closure
• Knowledge of PCIe, AXI, DDR, Ethernet; familiarity with CXL/UAL
• Familiarity with UVM-based verification and emulation platforms (Palladium, Protium, Zebu)
• Hardware debugging experience
• Proficient in Python, Tcl, Makefiles, and Shell scripting

Responsibilities

• Participate in all phases of product development from architecture through implementation and validation
• Collaborate with architects and hardware/firmware engineers to implement features
• RTL Development: design, verify, and validate high-performance logic (PCIe Gen6/7, CXL, Ethernet, DDR)
• System Level Integration: integrate custom IP within AMD Vivado-based flows
• Pre-Si Verification: perform pre-silicon verification and emulation
• Post-Si Validation: lead Bring-up and debug complex hardware/software interactions

Skills

SystemVerilog/Verilog

Python

Tcl

Shell scripting

Education

Bachelors or Masters in Computer/Electrical Engineering

Tools

Palladium

Protium

Zebu

Vivado

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger- technologythat moves the world forward.Join us and, together, we'll advance your career.

THE ROLE:

Join our team to architect and develop cutting-edge hardware/software co-design solutions for ASIC/FPGA-based acceleration across a wide range of applications-such as networking, storage, automotive, aerospace, and emerging AI/ML workloads. You will design high-performance hardware acceleration engines and embedded software that orchestrates them, enabling next-generation compute platforms.

THE PERSON:

You are passionate about modern processor architecture, digital design, and system-levelvalidation. You thrive in collaborative environments, communicate effectively across global teams, and bring strong analytical and problem-solving skills. You are eager to learn and tackle complex technical challenges.

KEY RESPONSIBILITIES

• Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for Ips
• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to bedeveloped
• RTL Development: Design, verify, and validate high-performance logic using System Verilog/Verilog. You will focus on the data and control path, implementing deigns for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6.
• System Level Integration:Utilize thestandard ASIC flows , AMD (Xilinx) Vivado ecosystems to integrate custom IP with other subsystems
• Pre-Si Verification:Perform pre-silicon verification and emulation to ensure functional correctness and performance
• Post-Si Validation: Lead the "Bring-up" process in the lab. Perform post-silicon validation, debugging complex interactions between the embedded software and hardware fabric

PREFERRED EXPERIENCE

• Hands-on experience with ASIC/FPGAs
• RTL Expertise: Expert inSystemVerilog/Verilog, synchronous design, and timing closure for high-speed logic
• Protocols: Knowledge of PCIe, AXI, DDR, and Ethernet. Familiarity with CXL or UAL is highly desirable
• Verification: Familiarity with UVM-based verification frameworks and emulation platforms (Palladium, Protium, Zebu)
• Validation: Experience in hardware debugging
• Tools:Proficiencyin Python,Tcl,Makefiles, and Shell scripting for automation

ACADEMIC CREDENTIALS

• Bachelors orMastersdegree in computer engineering/Electrical Engineering

LOCATION:San Jose CA

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.