Senior SI/PI Engineer for DDR4/5 Memory Interfaces

Rambus.com; Johns Creek (GA); Presencial; USD 134.000 - 249.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Equity

401(k) match

Medical & dental benefits

Gym membership

Time-off program

Descripción de la vacante

Rambus, a premier chip and silicon IP provider, seeks a Sr. Principal Engineer with SI and package design expertise to join the Memory Interface Chips BU in Johns Creek, GA.

You will model, analyze, and simulate SI/PI for high-speed DDR products up to 12800+ MT/s, reporting to the VP of Engineering in a full-time role. You will lead design and validation efforts, define system requirements, and collaborate with customers to optimize SI/PI solutions, leveraging your deep knowledge of EM,

Formación

• Requires MS/PhD in Electrical Engineering with 10+ years of industry experience including DDR4/5
• Proven leadership in SI/PI and package design
• Strong background in EM and transmission line theory, and equalization techniques

Responsabilidades

• Create SI/PI methodologies and collaborate with Design and SI teams on SI/PI study and package design for the latest DDR products
• Define specifications and system design requirements including packaging and PCB routing, IC-PKG-BRD decoupling, channel simulations and jitter analysis
• Provide guidance to design team based on SI/PI studies and silicon correlations for superior SI performance
• Collaborate with customers to find optimal SI/PI solutions
• Assist with lab debugging and bring-up as needed

Conocimientos

SI/PI design

DDR4/5 expertise

Package design

Technical leadership

Communications

Educación

MS or PhD in Electrical Engineering

Herramientas

ADS

HFSS

Q3D/PowerSI

Virtuoso

RedHawk/Totem or XcitePI

Descripción del empleo

Rambus, a premier chip and silicon IP provider, seeks a Sr. Principal Engineer with SI and package design expertise to join the Memory Interface Chips BU in Johns Creek, GA.

You will model, analyze, and simulate SI/PI for high-speed DDR products up to 12800+ MT/s, reporting to the VP of Engineering in a full-time role. You will lead design and validation efforts, define system requirements, and collaborate with customers to optimize SI/PI solutions, leveraging your deep knowledge of EM,