Sr Principal Engineer -SIPI

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Paid vacation and holidays

Job summary

Cadence Design Systems, Inc. in San Jose, CA is seeking a Sr Principal SI/PI Engineer to join the HPP IP R&D Group. This is a hands-on role focused on high-speed IP products, SI/PI optimization, and collaboration with chip designers.

The position requires an advanced degree and 3+ years in SerDes/PHYs, with strong lab skills and experience using extraction tools. A broad set of SI/PI responsibilities includes model development, guidelines, and customer technical support.

Qualifications

• MS/PhD in Electrical Engineering or equivalent required.
• 3+ years with high-speed SerDes and PHYs.
• Strong understanding of high-speed SerDes architectures.
• Hands-on lab experience with high-speed test equipment.
• Experience with 3D/2.5D extraction tools and IBIS-AMI simulations.
• Good PCB/FCBGA design rule knowledge.
• Strong debugging, problem-solving and communication skills.

Responsibilities

• Work on test chip package SI/PI optimization and verification.
• Optimize evaluation board designs for best SI/PI performance.
• Provide extracted channel models for chip designers.
• Develop and share SI/PI design guidelines with customers.
• Review customer package/board designs and simulations for feedback.
• Run link simulations using S-parameter models and IBIS-AMI models.
• Assist with SI/PI debug of test chips or customer ASICs in lab.

Skills

High-speed SerDes

PHYs

Debugging

Problem solving

Communication skills

Presentation skills

Lab measurement correlation

Education

M.S. or Ph.D. Electrical Engineering

Tools

Oscilloscopes

TDRs

VNAs

Spectrum analyzers

Sigrity Clarity

PowerSI

HFSS

SIwave

IBIS-AMI simulations

Job description

SAN JOSE

Full time

R54206

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Sr Principal EngineeThis is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems. We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands-on technical position.

Main Job Tasks and Responsibilities:

• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results. Help with providing feedback to customers to ensure best possible performance of our IP in their ASIC.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.
• Help with SI/PI related debug of test chips or customer ASICs in the lab.

Position Requirements:

• M.S. or Ph.D. Electrical Engineering (or similar degree)
• 3+ years of experience preferably working with high speed SerDes and PHYs
• Good understanding of high speed SerDes architecture
• Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave
• Experience with IBIS-AMI model simulations
• Experience with simulation result to lab measurement correlation
• Good understanding of PCB and FCBGA design rules and requirements
• Strong debugging and problem-solving skills
• Excellent communication and presentation skills to effectively communicate with both customers and internal stake holders

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include:

• paid vacation and paid holidays
• 401(k) plan with employer match
• employee stock purchase plan
• a variety of medical, dental and vision plan options

and more.

We’re doing work that matters. Help us solve what others can’t.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.