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ScaleFlux in San Jose, California, is seeking a Sr. ASIC Design Engineer to join our expanding team focused on high-performance data center infrastructure ASIC design and SOC development.
You will develop RTL in Verilog/SystemVerilog, work on NAND memory controllers, and collaborate with customers to validate designs and deliver timely, high-quality results for enterprise-scale systems. This role requires strong debugging skills, clear communication, and the ability to work across
We are looking for Sr. ASIC Design Engineer to join our rapidly growing ASIC design team focused on high performance data center infrastructure ASIC design and SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create the next generation enterprise data center solutions.
San Jose, California