SOC Validation Engineer

HCLTech; Sunnyvale (CA); On-site; USD 78,000 - 148,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Pharmacy benefits

Life insurance

AD&D

Disability insurance

EAP (Employee Assistance Program)

401(k) retirement plan

Paid time off (PTO)

10 paid holidays

Job summary

HCLTech is seeking a talented SOC Validation Engineer to drive end-to-end validation of complex SoC designs across pre-silicon and post-silicon phases. The ideal candidate will have deep expertise in SoC IP subsystems, including Clock, Reset, Ethernet, and I/O, and will develop test strategies and validation plans to root-cause failures from simulation through first silicon.

Responsibilities include creating verification plans for SoC IP subsystems, executing directed and constrained-random

Qualifications

• Experience in end-to-end SoC validation for pre- and post-silicon phases.
• Strong understanding of IP subsystems and interfaces (Clock, Reset, Ethernet, I/O).
• Ability to develop test strategies, run validation plans, and debug failures.

Responsibilities

• Develop verification plans for SoC-level IP subsystems including clocks, resets, Ethernet, and I/O interfaces.
• Create and run directed and constrained-random tests for IP integration and SoC validation.
• Verify CDC, POR, link negotiation, and data-path integrity across domains.
• Develop automated test frameworks for regression and production testing.

Skills

SoC validation

Clock/Reset/IP integration

Python scripting

Test planning

Debugging & RTL debug

Education

B.S./M.S./Ph.D. in Electrical Engineering or related field

Tools

Python

Perl

Tcl

Emulation platforms (Palladium, Veloce, Protium)

FPGA prototyping

Job description

HCLTech is looking for a highly talented and self- motivated SOC Validation Engineer to join it in advancing the technological world through innovation and creativity.

Job Title: SOC Validation Engineer

Job REQ ID: 134206

Position Type: Full Time

Summary

We are looking for an experienced SoC Validation Engineer to drive end-to-end validation of complex System-on-Chip (SoC) designs across both pre-silicon and post-silicon phases. The ideal candidate brings deep domain expertise in SoC IP subsystems — including Clock, Reset, Ethernet, I/O controllers, and related infrastructure IPs — with proven ability to develop test strategies, execute validation plans, and root-cause failures from simulation through first silicon and production.

Key Responsibilities

• Develop comprehensive verification and validation plans for SoC-level IP subsystems including Clock Generation/Distribution (PLLs, clock muxes, dividers), Reset Architecture, Ethernet MAC/PHY, and I/O interfaces (GPIO, I2C, SPI, UART, JTAG)
• Create and execute directed and constrained-random tests targeting IP integration, connectivity, and functional correctness at the SoC level
• Verify clock domain crossings (CDC), reset sequencing, and power-on reset (POR) behavior
• Validate Ethernet data path integrity, link negotiation, and MAC-to-PHY (MII/RGMII/SGMII) interfaces
• Perform functional coverage analysis and drive coverage closure across IP blocks
• Collaborate with design and architecture teams on RTL debug, assertions, and specification reviews
• Execute validation on emulation/FPGA prototyping platforms (Palladium, Veloce, Protium) for early software/firmware integration
• Bring up and validate SoC IPs on first silicon and platform boards
• Develop and execute post-silicon test plans covering:
• Clock: PLL lock times, frequency accuracy, jitter characterization, clock switching, glitch-free mux transitions
• Reset: Reset assertion/de-assertion sequencing, warm/cold reset flows, watchdog timer resets, brown‑out detection
• Ethernet: Link bring-up, auto‑negotiation, packet integrity (CRC/FCS), throughput/latency, loopback testing, PTP/IEEE 1588 timestamping
• Debug silicon failures using oscilloscopes, logic analyzers, protocol analyzers, JTAG/DFx, and embedded trace tools
• Perform root-cause analysis of post-silicon bugs and drive resolution with design and firmware teams
• Characterize IP performance under varying voltage, frequency, and temperature (VFT) conditions
• Develop and maintain automated test frameworks for regression and production testing
• Collaborate with platform, firmware, BSP, and driver teams on system-level integration and debug

General

• Author and maintain validation documentation: test plans, debug reports, coverage metrics, and known‑issue databases
• Develop Python/Perl/Tcl scripts for test automation, log parsing, and result analysis
• Participate in silicon bring‑up triage, failure analysis, and bug review meetings
• Mentor junior engineers and drive process improvements in validation methodology
• Interface with IP vendors for third‑party IP integration, compliance, and issue resolution

Required Qualifications

• Education: B.S./M.S./Ph.D. in Electrical Engineering, Computer Engineering, or related field
• Experience: 4–10+ years in SoC validation (pre‑silicon and/or post‑silicon)
• Deep understanding of SoC architecture and IP integration concepts

Pay and Benefits

• Pay Range Minimum: $78000/annum
• Pay Range Maximum: $148000/annum

HCLTech is an equal opportunity employer, committed to providing equal employment opportunities to all applicants and employees regardless of race, religion, sex, color, age, national origin, pregnancy, sexual orientation, physical disability or genetic information, military or veteran status, or any other protected classification, in accordance with federal, state, and/or local law. Should any applicant have concerns about discrimination in the hiring process, they should provide a detailed report of those concerns to [e-mail] for investigation.

A candidate’s pay within the range will depend on their skills, experience, education, and other factors permitted by law.

This role may also be eligible for performance‑based bonuses subject to company policies.

In addition, this role is eligible for the following benefits subject to company policies:

• medical
• dental
• vision
• pharmacy
• life
• accidental death & dismemberment
• disability insurance
• employee assistance program
• 401(k) retirement plan
• 10 days of paid time off per year (some positions are eligible for need‑based leave with no designated number of leave days per year)
• 10 paid holidays per year

How You’ll Grow

At HCLTech, we offer continuous opportunities for you to find your spark and grow with us. We want you to be happy and satisfied with your role and to really learn what type of work sparks your brilliance the best. Throughout your time with us, we offer transparent communication with senior‑level employees, learning and career development programs at every level, and opportunities to experiment in different roles or even pivot industries. We believe that you should be in control of your career with unlimited opportunities to find the role that fits you best