SoC Test Infrastructure Engineer - TPU & HPC (NPI/ATE)

Google

Sunnyvale (CA)

On-site

USD 138,000 - 198,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Google Sunnyvale is seeking an SoC Test Infrastructure Engineer to shape AI/ML hardware acceleration through post‑silicon test strategies and automated ATE development. You will drive NPI test programs for TPU and HPC products, partnering with architecture, design, and manufacturing teams.

The role emphasizes pre‑silicon validation, test content development, and end‑to‑end test lifecycle automation, with a focus on scalable silicon testing for AI workloads.

Qualifications

  • Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related field, or equivalent practical experience.
  • 4 years of experience in test engineering.
  • Experience in Python, Java, C# or C/C++.
  • Experience with Advantest or Teradyne platforms.

Responsibilities

  • Collaborate with Architecture, Design, and Verification teams to develop product bring‑up and validation strategies for HPC products.
  • Verify test solutions on pre‑silicon models and develop ATE test modules, DC tests, binning, production flows.
  • Develop and validate test programs on ATE platforms for NPI in preparation for HVM with vendors and cross‑functional teams.
  • Develop tools and methodologies to automate the testing lifecycle.
  • Influence and work with partners to enable automated test problem solutions.

Skills

Python
Java
C/C++
Test engineering
Advantest/Teradyne

Education

Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related field

Job description

Google Sunnyvale is seeking an SoC Test Infrastructure Engineer to shape AI/ML hardware acceleration through post‑silicon test strategies and automated ATE development. You will drive NPI test programs for TPU and HPC products, partnering with architecture, design, and manufacturing teams.

The role emphasizes pre‑silicon validation, test content development, and end‑to‑end test lifecycle automation, with a focus on scalable silicon testing for AI workloads.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior ASIC/SoC Test Engineer for TPU Silicon
Senior ASIC/SoC Test Engineer for TPU Silicon

Google Inc. • Sunnyvale (CA)

On-site
USD 163,000 - 236,000
Senior ATE Test Engineer, AI/ML Silicon for Cloud
Senior ATE Test Engineer, AI/ML Silicon for Cloud

Google • Sunnyvale (CA)

On-site
USD 163,000 - 236,000
Staff ATE Test Architect for AI SoCs
Staff ATE Test Architect for AI SoCs

Google • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
TPU SoC Design Engineer - AI Hardware
TPU SoC Design Engineer - AI Hardware

Google • Sunnyvale (CA)

On-site
USD 116,000 - 166,000
AI Hardware SoC RTL Engineer — TPU
AI Hardware SoC RTL Engineer — TPU

Google • United States

On-site
USD 116,000 - 166,000
Bonus target
Equity
Benefits
Chip Package SI/PI Engineer for AI/ML Accelerators
Chip Package SI/PI Engineer for AI/ML Accelerators

Google • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
Staff ATE Test Engineer - SoC/TPU Test & Yield Leader
Staff ATE Test Engineer - SoC/TPU Test & Yield Leader

Google Inc. • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
Equity
SoC DFT Engineer for AI/ML TPU Hardware
SoC DFT Engineer for AI/ML TPU Hardware

Google • United States

On-site
USD 163,000 - 236,000
TPU Silicon Validation Engineer — AI/ML Hardware
TPU Silicon Validation Engineer — AI/ML Hardware

Google • Sunnyvale (CA)

On-site
USD 138,000 - 198,000
15% bonus target
Equity
Comprehensive benefits package
SoC Test Infrastructure Engineer, Google Cloud
SoC Test Infrastructure Engineer, Google Cloud

Google • Sunnyvale (CA)

On-site
USD 138,000 - 198,000