SoC Solutions Engineer - Memory IP & Silicon Bring-up

Synopsys, Inc.; Sunnyvale (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Synopsys, Inc. in Sunnyvale, CA, seeks an experienced SoC design/verification engineer with deep expertise in Memory Interface and Interface IP to lead integration of IP into complex SoCs, drive subsystem verification, and support silicon bring-up.

You will collaborate with customers and internal teams, develop reference designs, address IP integration challenges, and stay ahead on DDR5/LPDDR6/HBM technologies to accelerate deployment across AI, networking, automotive, and mobile platforms.

Qualifications

• 15+ years of industry experience in SoC design, verification, implementation, or silicon development.
• Hands-on experience with Memory Interface IP such as DDR, LPDDR, and HBM, or Interface IP such as PCIe, Ethernet, CXL, or UCIe.
• Proven experience developing reference designs and delivering silicon-proven solutions.

Responsibilities

• Lead technical customer engagements for integration, bring-up, and deployment of Memory Interface PHY and Controller IP (HBM, DDR, LPDDR).
• Develop reference designs and subsystem architectures to demonstrate best practices for IP integration.
• Integrate memory and interface IP into production SoCs, guiding verification and silicon readiness.
• Solve complex IP integration challenges, optimize performance, ensure interoperability, and support silicon bring-up.
• Serve as technical interface between customers and internal teams to demonstrate integration methodologies and reduce deployment risk.
• Provide leadership, training, and presentations to support customer implementation and technology adoption.
• Translate customer feedback into product and engineering improvements and influence future features.
• Stay at the forefront of DDR5, LPDDR6, MRDIMM2, HBM4, PCIe, Ethernet, CXL, and UCIe architectures for next-gen SoCs.

Skills

SoC design

Verification

Memory Interface IP

DDR

LPDDR

HBM

PCIe

Ethernet

CXL

UCIe

AMBA/AXI interfaces

Linux

Verilog/SystemVerilog

Communication skills

Education

Bachelors or Masters in Electrical/Computer Engineering (VLSI focus)

Job description

Synopsys, Inc. in Sunnyvale, CA, seeks an experienced SoC design/verification engineer with deep expertise in Memory Interface and Interface IP to lead integration of IP into complex SoCs, drive subsystem verification, and support silicon bring-up.

You will collaborate with customers and internal teams, develop reference designs, address IP integration challenges, and stay ahead on DDR5/LPDDR6/HBM technologies to accelerate deployment across AI, networking, automotive, and mobile platforms.