SoC Power Lead: Memory Subsystem & PPA Architect

Google; San Diego (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google is seeking a senior hardware engineer to lead memory subsystem power for Tensor mobile SoCs in the United States. You will drive cross-functional teams to achieve PPA goals, optimize DDRPHY, DRAM, and memory controllers, and influence SoC-wide power modeling and traffic analysis.

This role emphasizes product delivery from concept to mass production with leadership responsibilities. Ideal candidates will have a strong track record in low power design, memory architectures, and effective

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience with memory subsystem architectures, including for mobile SoCs.
• Experience in power management or low power design/methodology, as well as with low power architecture and power optimization techniques.
• Experience with full product delivery cycle (definition, architecture, design and implementation, testing, productization).
• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience with memory subsystem architectures, cache hierarchies, system-level power and performance modeling, SoC-wide traffic analysis and optimizations, LPDDR standards, etc.
• Excellent leadership, organizational, and communication skills.

Responsibilities

• Lead the definition of power requirements for Tensor mobile System-on-Chips (SoCs) to achieve Power-Performance-Area (PPA) with a primary focus on the memory subsystem (memory controller, DDRPHY, DRAM).
• Own and drive cross-functional teams to deliver on power Key Performance Indicators (KPIs) for the memory subsystem and other major SoC IPs.
• Propose and drive power optimizations for the memory subsystem throughout the design process from concept to mass productization.
• Drive power-performance trade-off analysis for engineering reviews and product roadmap decisions.
• Represent status of SoC power to the executive leadership team.

Skills

Memory subsystems

Power management

SoC product delivery

Education

Bachelor's degree

Master's degree or PhD (preferred)

Job description

Google is seeking a senior hardware engineer to lead memory subsystem power for Tensor mobile SoCs in the United States. You will drive cross-functional teams to achieve PPA goals, optimize DDRPHY, DRAM, and memory controllers, and influence SoC-wide power modeling and traffic analysis.

This role emphasizes product delivery from concept to mass production with leadership responsibilities. Ideal candidates will have a strong track record in low power design, memory architectures, and effective