Job Overview
We are building a low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing, and service delivery associated with satellite and terrestrial IoT systems. If you are passionate about bridging Earth and space to enable hyper‑scaled IoT solutions, you’ll fit right in.
We’re intentional, unapologetically curious, and 100 % committed to innovating space‑based communications and delivering actionable intelligence that will expand global economies, protect space and our planet, and enhance the overall quality of life.
What you’ll do
- IP Integration and Verification
- Evaluate, integrate, and verify IP blocks within the SoC, ensuring connectivity, configuration, and interoperability across the platform.
- Author targeted test firmware to bring up and verify individual IP blocks and hardware features at the module level.
- Develop subsystem-level test firmware to validate interactions between integrated components and confirm correct system behavior across hardware boundaries.
- Testbench Development and Build Flows
- Define, implement, and maintain system-level testbenches covering subsystem and full‑SoC verification scenarios.
- Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment.
- SoC Feature Implementation
- Implement hardware security features, including secure boot, hardware root of trust, and cryptographic accelerator integration.
- Define and implement communication fabrics and protocols between SoC subsystems, including AMBA-based interconnects (AXI, AHB, APB).
- Implement power management features such as power domain control, clock gating, and low‑power state transitions.
- Define and implement the SoC boot architecture, including reset sequencing, configuration registers, and boot ROM integration.
- Cross‑Functional Partnership & Documentation
- Work closely with SoC firmware engineers, RTL designers, and physical design teams to ensure cohesive hardware‑software integration throughout the development cycle.
- Produce and maintain clear technical documentation covering integration specifications, verification plans, test procedures, and feature implementation details.
Qualifications & Skills
- Hardware Description Languages – Proficiency in RTL design and verification using SystemVerilog and/or VHDL.
- Verification Methodologies – Experience with UVM or a similar structured verification methodology.
- Firmware Development – Ability to write bare‑metal C firmware for hardware bring‑up, feature validation, and test automation on embedded targets.
- AMBA Interconnects – Strong knowledge of AMBA protocols (AXI, AHB, APB) and their application in SoC integration.
- SoC Architecture – Understanding of SoC subsystem partitioning, memory maps, interrupt routing, and hardware/software interfaces.
- Debugging Tools – Experience with simulation tools (VCS, Questa, Xcelium) and hardware debug environments (JTAG, logic analyzers, oscilloscopes).
- Scripting – Proficiency in scripting languages such as Python, Tcl, Bash, and Makefiles for build flow automation and test infrastructure.
- Version Control – Expertise with Git or a similar version control system.
- ARM Corstone Reference Designs – Experience integrating Cortex‑M or Cortex‑A processors.
- Trusted Firmware & Security – Familiarity with TrustedFirmware‑M, MCUboot, or PSA‑certified security architectures.
- Cryptographic & Post‑Quantum Knowledge – Understanding of embedded security concepts, cryptographic algorithms, and Post‑Quantum Cryptography.
- Formal Verification – Experience with formal verification or property‑checking tools.
- Processor Knowledge – Familiarity with Cortex‑A, Cortex‑M, NPU, and DSP processors.
- FPGA Emulation – Experience with FPGA emulation platforms for pre‑silicon validation.
- Telecom Protocols – Knowledge of 3GPP network protocols as they relate to SoC modem or connectivity subsystem integration.
- Low‑Power Design – Experience with power intent methodologies (UPF/CPF).
- Education – Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Salary & Benefits
This is a full‑time, exempt position based in our Saratoga, California office. The target base pay range is $150,000 – $220,000 annually; total compensation will be determined by job‑related knowledge, skills, and experience. You will receive a competitive benefits package, including health and wellness care options, paid holidays, paid time off, continuous learning and development, financial solutions, optional legal services (U.S. only), and a focus on sustainability and fair workplace practices.
Location & Employment
Full‑time, exempt, office‑based in Saratoga, California. E‑Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.