ASIC Verification Engineer

Espace; Saratoga (CA); On-site; USD 140,000 - 200,000; Full time

Benefits offered by this job

Competitive salaries

Paid holidays

Paid time off

Health and wellness options

Job summary

E‑Space in Saratoga, CA seeks a seasoned Verification Engineer to design, simulate and verify high-performance digital, analog and RF ICs for 5G, IoT and satellite applications. Lead UVM-based verification, develop testbenches, and collaborate with RTL designers and system teams to meet stringent quality standards.

Applicants should bring 5–10 years of ASIC verification experience, proficiency in SystemVerilog and VHDL, and strong debugging skills.

Qualifications

• Minimum of 5–10 years of experience in ASIC verification for complex digital systems.
• Deep expertise in SystemVerilog and strong working knowledge of VHDL for design and verification in mixed-language environments.
• Hands-on experience with UVM-based verification methodologies.
• Solid understanding of digital design fundamentals.
• Experience verifying industry-standard protocols.
• Strong debugging skills using simulation tools and waveform analysis.
• Excellent communication skills and ability to work effectively in cross-functional teams.
• Advanced assertion-based verification or formal intent.
• Exposure to gate-level simulation, formal verification, emulation, or FPGA prototyping.
• Experience scaling or owning verification infrastructure for large or multi-project SoCs.
• Experience in verifying complex SoCs integrating CPUs, DSPs, and mixed-signal blocks.
• Passion and direct experience in LEO satellite component development, design and in-orbit activities.

Responsibilities

• Verify complex digital designs across custom IP blocks, subsystems, and full-chip SoC levels
• Translate architecture and micro-architecture specifications into executable verification plans
• Design, develop, and maintain scalable UVM-based verification environments
• Develop high-quality testbenches using SystemVerilog and support VHDL and mixed-language environments
• Drive functional and code coverage, analyze results, and close coverage gaps
• Debug complex issues using simulation, waveform analysis, assertions, and root-cause analysis
• Collaborate closely with architects, RTL designers, and system teams
• Document verification plans, methodologies, and results, and provide clear status updates to leadership

Skills

SystemVerilog

UVM

VHDL

Debugging

Communication

Tools

SystemVerilog simulators

Emulation tools

FPGA prototyping

Job description

Overview

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place! E‑Space is bridging Earth and space to enable hyper‑scaled deployments of Internet of Things (IoT) solutions and services. We are building a low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.

We’re intentional, unapologetically curious and 100% committed to innovate space‑based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.

Job Purpose

We are seeking a highly skilled and experienced Verification Engineer to join our engineering team. In this role, you will be responsible for designing, simulating, and verifying high‑performance digital, analog and RF integrated circuits for applications such as 5G, IoT and satellite communications. You will collaborate with cross‑functional teams to define requirements, develop innovative design solutions, and ensure that products meet the highest standards of quality and performance.

Responsibilities

• Verify complex digital designs across custom IP blocks, subsystems, and full‑chip SoC levels
• Translate architecture and micro‑architecture specifications into executable verification plans
• Design, develop, and maintain scalable UVM‑based verification environments
• Develop high‑quality testbenches using SystemVerilog and support VHDL and mixed‑language environments
• Drive functional and code coverage, analyze results, and close coverage gaps
• Debug complex issues using simulation, waveform analysis, assertions, and root‑cause analysis
• Collaborate closely with architects, RTL designers, and system teams
• Document verification plans, methodologies, and results, and provide clear status updates to leadership

Qualifications

• Minimum of 5–10 years of experience in ASIC verification for complex digital systems
• Deep expertise in SystemVerilog and strong working knowledge of VHDL for design and verification in mixed‑language environments
• Hands‑on experience with UVM‑based verification methodologies
• Solid understanding of digital design fundamentals
• Experience verifying industry‑standard protocols
• Strong debugging skills using simulation tools and waveform analysis
• Excellent communication skills and ability to work effectively in cross‑functional teams
• Advanced assertion‑based verification or formal intent
• Exposure to gate‑level simulation, formal verification, emulation, or FPGA prototyping
• Experience scaling or owning verification infrastructure for large or multi‑project SoCs
• Experience in verifying complex SoCs integrating CPUs, DSPs, and mixed‑signal blocks
• Passion and direct experience in LEO satellite component development, design and in‑orbit activities

Compensation & Location

This is a full‑time, exempt position based out of our Saratoga office. The target base pay for this position is $140,000 – $200,000 annually. Total compensation will be determined by various factors such as relevant job‑related knowledge, skills, and experience.

Employment Restrictions

E‑Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.

Benefits and Work Environment

As a member of our team, you will play a crucial role in driving our success. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there may be extra hours, including nights and weekends, to meet critical deadlines and mission goals. In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high‑growth industry.

We support and invest in the physical, emotional and financial well‑being of our team members and their families. These benefits include:

• Opportunity to make a difference
• Sustainability at our core
• Fair and honest workplace
• Innovative thinking encouraged
• Competitive salaries
• Continuous learning and development
• Health and wellness care options
• Financial solutions for the future
• Optional legal services (US only)
• Paid holidays
• Paid time off