SoC Physical Design Verification Engineer

AECOM; Beaverton (OR); On-site; USD 90,000 - 130,000; Full time

Job summary

A leading company seeks a SoC Physical Design Verification Engineer in Beaverton, Oregon. In this role, you will be responsible for physical verification checks, collaborating with technical teams to ensure high-performance processor design. Your qualifications in physical design flows and scripting will contribute to the success of cutting-edge silicon technology.

Qualifications

• Bachelor's degree required.
• Experience with physical verification flows and DRC/LVS.
• Layout design experience preferred.

Responsibilities

• Perform physical verification checks like LVS and DRC.
• Collaborate with CAD/Technology teams for flow validation.
• Lead schedules for cross-functional engineering efforts.

Skills

Physical verification flows

DRC/LVS/ANT

Scripting skills

Education

Bachelor's degree

Tools

Mentor Calibre

Synopsys ICV

Job description

SoC Physical Design Verification Engineer

**Beaverton, Oregon, United States**

**Hardware**

**Summary**

Posted: **Jun 04, 2025**

Role Number: **200607501**

At Apple, we work every single day to craft products that enrich people's lives! Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining our group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices!

In this highly visible role, you will be part of a critical team responsible for physical verification of an SOC.

**Description**

- As a member of our physical design team, you will perform various types of physical verification checks such as LVS, DRC, design-for-manufacturing & design-for-yield, and lithography at the chip and block level.
- You will collaborate with the CAD/Technology teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout.
- You will lead schedules and support cross-functional engineering efforts.
- You will work on padring, bump, RDL design, and working with the package and floorplan teams.

**Minimum Qualifications**

+ Minimum Bachelor's degree.

+ Experience with physical verification flows, DRC/LVS/ANT and/or layout integration methodology.

**Preferred Qualifications**

+ Knowledge of RTL and GDS physical design flows.

+ Scripting skills to debug flow related issues and make enhancements as appropriate.

+ Experience with industry standard tools used for physical verification such as Mentor Calibre, and/or Synopsys ICV.

+ Layout design experience.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (https://www.apple.com/jobs/pdf/EverifyPosterEnglish.pdf) .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.