SoC Emulation Engineer — Debug, Verification & Tooling

Quest Global; Sunnyvale (CA); On-site; USD 160,000 - 170,000; Full time

Benefits offered by this job

401(k)

401(k) matching

Dental insurance

Health insurance

Life insurance

Paid time off

Referral program

Vision insurance

Short/Long Term Disability

Job summary

Quest Global is seeking an Emulation Verification Engineer in Sunnyvale, CA to join a cross-functional team. You will develop zebu debug environments for SS and IP, run DV/RTL/Power scenarios, and create C/C++ firmware and tests to validate test plans on emulation platforms.

You will collaborate with architects, designers and verification engineers to reproduce failures, bring up system-level models, and advance verification methodologies on emulation platforms.

Qualifications

• Hands-on experience with SOC simulation and emulation.
• Experience debugging emulation and verification flows.
• Proficient in SystemVerilog, C/C++, Python.
• Familiar with ARM-based subsystems.

Responsibilities

• Play a role in developing zebu debug environment for SS and IP.
• Work with cross functional team (DV, RTL, Power) to run scenarios and debug failures.
• Develop C/C++ FW and tests to validate and execute test plans.
• Build tools and methodologies to validate and debug HW/SW/FW on emulation.
• Bring up system-level emulation models through reset, boot, OS/bare metal.
• Collaborate with architects, designers, software engineers to reproduce failures on emulation.
• Develop, execute, and debug full-chip/SoC tests on emulation platforms.
• Explore new verification and emulation methodologies and implement them.

Skills

SOC simulation

emulation platforms

Zebu

SystemVerilog

C/C++

Python

ARM based SS

debugging

analytical skills

Tools

Zebu

Job description

Quest Global is seeking an Emulation Verification Engineer in Sunnyvale, CA to join a cross-functional team. You will develop zebu debug environments for SS and IP, run DV/RTL/Power scenarios, and create C/C++ firmware and tests to validate test plans on emulation platforms.

You will collaborate with architects, designers and verification engineers to reproduce failures, bring up system-level models, and advance verification methodologies on emulation platforms.