SoC DFT Engineer - Architect & Debug Lead

Retym, Inc; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Job summary

Retym, Inc is seeking a DFT Engineer to define and implement advanced design-for-test methodologies for complex digital and mixed-signal chips in Austin, Texas. The role involves collaborating with design teams and working on silicon test strategies.

The ideal candidate will have over 5 years of experience in DFT specification, validation, and design processes. A master's degree in Electrical Engineering is preferred. This position offers a fantastic opportunity in a well-funded start-up environment.

Qualifications

• 5+ years of experience in DFT specification definition and architecture.
• Experience in silicon bring-up and validation of DFT features.
• Strong understanding of ASIC DFT processes.

Responsibilities

• Implement SoC DFT strategy and architecture.
• Work on hierarchical design and debug design rule checks.
• Document DFT working processes.

Skills

DFT specification definition

Silicon bring-up

Debugging ATPG patterns

Fault modeling

Attention to detail

Education

Master's degree in Electrical Engineering

Tools

Design/Fusion Compiler

DFT Max

SpyGlass

Modus

Tessent

TestKompress

Job description

Retym, Inc is seeking a DFT Engineer to define and implement advanced design-for-test methodologies for complex digital and mixed-signal chips in Austin, Texas. The role involves collaborating with design teams and working on silicon test strategies.

The ideal candidate will have over 5 years of experience in DFT specification, validation, and design processes. A master's degree in Electrical Engineering is preferred. This position offers a fantastic opportunity in a well-funded start-up environment.