SoC Design Verification Engineer | Remote Options + Equity

MatX; Mountain View (CA); Hybrid; USD 160,000 - 600,000; Full time

Benefits offered by this job

4 weeks PTO

12 holidays

Up to 3 weeks remote work

Health insurance

Dental & Vision

Life insurance

HSA & FSA

401K / Roth IRA with company match

Professional development budget

Team meals onsite

Commute reimbursement

AI resources stipend

Parental leave

Job summary

MatX is building cutting-edge silicon for high-performance GenAI in Mountain View, seeking silicon verification engineers to deliver performant, accurate silicon across compute, memory management, and high-speed connectivity. You’ll contribute to scalable verification strategies, own portions of the verification flow, and drive test plans and closure across key silicon milestones.

Ideal candidates have architecture-to-silicon verification experience, proficiency in SystemVerilog, Python and

Qualifications

• Experience driving verification from architecture/design specs to production silicon.
• Proficiency with SystemVerilog, Python, C/C++, Bluespec for verification and silicon modeling.
• Production experience with UVM, ABV; comfortable with formal and simulated verification.
• Experience creating portable tests/drivers for silicon validation and post-silicon debug.

Responsibilities

• Contribute to verification methodology with scalable solutions across blocks, subsystems, full-chip and system-level validation.
• Own portions of verification execution at subsystem/chip level and create testbenches, tests and related artifacts for coverage closure.
• Plan and drive intermediate and sign-off reviews on verification test plans, execution progress, and verification closure toward silicon milestones.

Skills

SystemVerilog

Python

C/C++

Bluespec

UVM

ABV

Formal verification

Debugging silicon

Tools

Emulation platforms

Prototyping platforms

Job description

MatX is building cutting-edge silicon for high-performance GenAI in Mountain View, seeking silicon verification engineers to deliver performant, accurate silicon across compute, memory management, and high-speed connectivity. You’ll contribute to scalable verification strategies, own portions of the verification flow, and drive test plans and closure across key silicon milestones.

Ideal candidates have architecture-to-silicon verification experience, proficiency in SystemVerilog, Python and