Silicon Verification Engineer 5

Protingent; Mountain View (CA); Remote; USD 150,000 - 200,000; Full time

Job summary

A leading company has a contract opportunity for a Silicon Verification Engineer 5. This fully remote role focuses on IP verification for silicon chips, requiring extensive experience in verification and C programming. Ideal candidates will have a strong background in SoCs and UVM testbench development, with competitive hourly pay and comprehensive benefits.

Benefits

Competitive salaries

Insurance options

Education reimbursement

Pre-tax commuter benefits

PTO

401k plan

Qualifications

• 10+ years of verification experience for SoCs.
• 4+ years of UVM-based testbench development.
• Experience in writing test plans for complex IP architectures.

Responsibilities

• Contributing to IP verification and writing test cases using C and SystemVerilog.
• Primarily independent debugging work with minimal meetings.
• Support available when needed.

Skills

C programming

Verification experience for SoCs

UVM-based testbench development

Debugging

Test plan writing

Job description

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Job Description

Position Title: Silicon Verification Engineer 5

Position Description: Protingent has an exciting contract opportunity for a Silicon Verification Engineer 5 with our client located in Mountain View, CA. This role is fully remote within the US, with a preference for candidates who can work standard PST business hours.

Job Responsibilities

• Purpose of the Team: The team focuses on building IPs for silicon chips, currently working on a complex IP with multiple blocks, requiring support in IP verification.
• Key Projects: Contributing to IP verification and writing test cases for high-level testing using C and SystemVerilog environments.
• Typical Tasks: The role involves primarily independent, heads-down work, debugging, and minimal meetings, with support available when needed.

Job Qualifications

• 10+ years of verification experience for SoCs, including C programming and verification test infrastructure.
• Experience in writing test plans for complex IP architectures, including dev and debug for SoC-level tests, AXI/AMBA protocols.
• 4+ years of UVM-based testbench development from scratch, including sequences, scoreboards, coverage, assertions.
• Overall 10+ years of industry experience; no degree required.
• Preferred experience with ASIC IP verification, C programming, debug, and FPGA-based platform testing.
• Seeking an experienced senior verification engineer with 15+ years of experience, capable of understanding complex architectures, developing test plans, C-based TB development, and block/SoC debug.

Job Details

• Type: Contract
• Location: Remote within US, preference for PST hours; Mountain View, CA also considered.
• Pay Range: $70/hr to $94/hr
• Background check required for employment consideration.

Benefits

Competitive salaries, insurance options, education reimbursement, pre-tax commuter benefits, PTO, and 401k plan.

About Protingent

Protingent specializes in top engineering and IT talent placement across various industries, committed to positive community impact and providing rewarding work opportunities.

Additional Information

• Seniority Level: Mid-Senior
• Employment Type: Contract
• Job Function: Quality Assurance