System Verification Engineer

CloudMantra; Sunnyvale (CA); On-site; USD 114,000 - 166,000; Full time

Job summary

A leading company in the tech industry seeks a System Verification Engineer to provide technical leadership in Formal Verification. The role involves developing formal environments and methodologies, mentoring engineers, and collaborating with design teams. Candidates should have extensive experience in RTL Design and Formal Verification, with proficiency in hardware description and scripting languages. Join us to tackle complex designs and drive innovation in verification technology.

Qualifications

• 5+ years in RTL Design/Verification, 3+ years in Formal Verification.
• Excellent understanding of formal verification methodologies.

Responsibilities

• Provide technical leadership in Formal Verification.
• Propose and implement Formal Verification Methodology across the group.

Skills

Analytical Skills

Communication

Fluency in Hardware Description Languages

Proficiency in Scripting Languages

Tools

JasperGold

VC-Formal

Simulators

Waveform Debugging Tools

Job description

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• Provide technical leadership in Formal Verification
• Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level
• Work with Architecture and Design team to come up with Formal driven specification and implementation
• Define formal verification scope, develop abstraction strategies, create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level
• Build reusable/scalable environments for Formal Verification and deploying the tools
• Evaluate and recommend EDA solutions for Formal Verification
• Provide training for internal teams and mentoring engineers related to Formal Verification Technology

Minimum Qualifications:

• 5+ years of experience in RTL Design/Verification area including 3+ years of experience in Formal Verification
• Excellent understanding of formal verification methodologies, complexity reduction techniques and abstraction techniques
• Strong analytical skills to craft Client and creative solutions to tackle industry-level complex designs
• Fluency in hardware description languages, such as SystemVerilog and SVA
• Proficiency in scripting languages such as Python, Perl, or Tcl
• Excellent communication skills to ensure effective collaboration with cross functional teams
• Knowledge of Formal verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc.
• Experience with JasperGold or VC-Formal
• Experience with simulators and waveform debugging tools

Preferred Qualifications:

• Experience in formal property verification of complex compute blocks like DSP, CPU, GPU or HW accelerators
• Experience with complex SoCs
• Formal verification expertise in clock domain crossing, IP-XACT based register verification and low power
• Experience with development of fully automated flows from specification to fully verified designs
• Ability to quickly understand and interpret specifications and extract design behaviors/properties.

Please feel free to reach out if you have any further questions at [e-mail].

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Quality Assurance

• Industries

  Business Consulting and Services

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