Silicon Validation Engineer, Infra Silicon

Meta; Sunnyvale (CA); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Infrastructure Silicon organization is seeking a Silicon Validation Engineer to lead silicon validation efforts for custom-designed accelerators and infrastructure ASICs powering Meta's data center fleet.

In this role, you will drive end-to-end validation strategy across the full silicon lifecycle — from pre-silicon planning and emulation-based verification through post-silicon bring-up, characterization, and fleet-scale deployment.

Qualifications

• Bachelor’s degree in CS/CE or equivalent practical experience.
• 8+ years of silicon validation experience.
• 8+ years in pre-silicon validation environments (RTL sim, emulation, FPGA).
• Post-silicon debug using logic analyzers, oscilloscopes, JTAG, or protocol analyzers.
• Experience building validation automation using Python/C/C++.
• Cross-team collaboration across ASIC design, firmware, and systems.

Responsibilities

• Define and own validation strategies for custom infrastructure ASICs and accelerators across pre- and post-silicon.
• Lead pre-silicon validation planning using simulation and emulation, mapping tests to specs and corner cases.
• Drive post-silicon bring-up activities including board-level debug and firmware integration.
• Develop and maintain automated validation frameworks and diagnostics for scaling to fleet deployments.
• Collaborate with design and architecture teams to influence testability and future silicon.
• Establish silicon quality metrics, characterization data, and yield analysis.
• Validate host-side integration, PCIe and fabric interconnects across full-stack servers.
• Identify systemic failure modes and drive corrective actions (errata, firmware workarounds).
• Mentor engineers on validation methodologies and best practices.
• Contribute to long-term validation roadmaps and tooling investments.

Skills

Validation strategy

Pre-silicon planning

Post-silicon bring-up

Automation frameworks

Collaboration with design

Quality metrics

Host integration

Failure analysis

Mentorship

Roadmapping

Education

Bachelor's degree

Job description

Summary:

Meta's Infrastructure Silicon organization is seeking a Silicon Validation Engineer to lead silicon validation efforts for custom-designed accelerators and infrastructure ASICs powering Meta's data center fleet. In this role, you will drive end-to-end validation strategy across the full silicon lifecycle — from pre-silicon planning and emulation-based verification through post-silicon bring-up, characterization, and fleet-scale deployment. You will serve as a technical authority bridging silicon design, systems architecture, and production infrastructure, ensuring that Meta's custom silicon meets rigorous performance, reliability, and functional requirements at scale.

Required Skills:

Silicon Validation Engineer, Infra Silicon Responsibilities:

1. Define and own comprehensive validation strategies for custom infrastructure ASICs, spanning functional correctness, performance characterization, reliability stress testing, and power analysis across pre- and post-silicon phases

2. Lead pre-silicon validation planning using simulation and emulation environments, authoring test plans that map to architectural specifications and cover corner cases across compute, memory, and I/O subsystems

3. Drive post-silicon bring-up activities including board-level debug, firmware integration, and systematic root-cause analysis of silicon failures using lab instrumentation and diagnostic tooling

4. Develop and maintain automated validation frameworks, silicon diagnostics, and performance analysis tools that scale from early lab environments to large-scale data center deployments

5. Collaborate with ASIC design, architecture, and physical design teams to provide validation feedback that influences design-for-testability decisions and next-generation silicon architecture

6. Establish and track silicon quality metrics, characterization data, and yield analysis to inform productization decisions and deployment readiness gates

7. Partner with systems and firmware engineering teams to validate host-side integration, PCIe and fabric interconnects, thermal management, and power delivery across full-stack server configurations

8. Identify systemic silicon failure modes observed in the production fleet and drive corrective actions through design errata documentation, firmware workarounds, or architectural improvements

9. Mentor other engineers on validation methodology, debug techniques, and best practices for infrastructure silicon bring-up and characterization

10. Contribute to long-term validation infrastructure roadmaps, defining tooling investments and methodology improvements that improve coverage and reduce time-to-production for future silicon generations

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

2. 8+ years of experience in silicon validation, hardware systems engineering, or post-silicon bring-up for custom ASICs, SoCs, or accelerator designs

3. 8+ years of experience with pre-silicon validation environments including RTL simulation, emulation platforms, or FPGA prototyping

4. Experience with post-silicon debug methodologies include use of logic analyzers, oscilloscopes, JTAG, and protocol analyzers for PCIe, DDR, or high-speed serial interfaces

5. Experience developing validation automation frameworks and diagnostic tooling using Python, C, or C++

6. Experience collaborating across ASIC design, architecture, firmware, and systems teams throughout the silicon development lifecycle

Preferred Qualifications:

Preferred Qualifications:

1. Experience with data center infrastructure silicon including AI/ML accelerators, network ASICs, or storage controllers in large-scale fleet environments

2. Experience defining design-for-testability requirements and contributing to silicon architecture reviews from a validation perspective

3. Familiarity with server systems architecture including PCIe topology, memory subsystems, and BMC-based platform management

4. Experience with power and thermal characterization, reliability stress testing, and silicon yield analysis for productization

Public Compensation:

$178,000/year to $250,000/year + bonus + equity + benefits

Industry:

Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affivative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [e-mail].