Signal Integrity Engineer, Infrastructure Hardware

Meta; Menlo Park (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Meta's infrastructure hardware team in Menlo Park is seeking a Staff Signal Integrity Engineer to own SI/PI methodology across data center platforms. You will define SI/PI standards, drive design and validation for high-speed interconnects, and collaborate with hardware design, silicon, and manufacturing teams to ensure reliable data transmission at scale.

Responsibilities include developing SI/PI solutions for AI, network, compute, and storage systems, performing simulations and lab

Responsibilities

• Develop SI/PI solutions for AI, network, compute, and storage platforms.
• Run SI simulations and measurements to validate channel margins.
• Create channel models (IBIS-AMI, S-parameters) for analysis.
• Define open interconnect tech and integrate into scalable systems.
• Collaborate on stackup, routing, vias, and impedance targets.
• Lead lab validation (TDR, VNA, scopes) to verify simulations.

Job description

# Signal Integrity Engineer, Infrastructure HardwareMenlo Park, CA Engineering+ 2 moreApply nowMeta's infrastructure hardware team is seeking a Staff Signal Integrity Engineer to drive the design and validation of high-speed interconnects across Meta's data center platforms. In this role, you will own the signal integrity methodology, design, analysis, and validation for next-generation AI, networking, compute, and storage platforms, ensuring reliable high-speed data transmission across Ethernet, PCIe, DDR, and optical interconnect interfaces. You will define SI/PI standards, guide platform architecture decisions, and collaborate closely with industry partners, hardware design, and silicon teams to deliver infrastructure at the scale Meta's global data centers demand.---## Signal Integrity Engineer, Infrastructure Hardware Responsibilities* Develop next-generation SI/PI solutions across a broad range of Meta platforms, including AI, network, compute, and storage systems* Perform signal integrity simulations, implementation, validation, and test methodologies at the platform, board, and system levels using industry-standard tools such as HSpice, ADS, or Sigrity to validate channel performance and margins* Develop and maintain channel models, IBIS-AMI models, and S-parameter extraction workflows for board-level and system-level SI analysis including end-to-end electrical-optical-electrical channels* Define the next generation of open on- and off-chip interconnect technologies and integrate these into highly scalable, deployable, and maintainable systems* Collaborate with design and manufacturing teams to define stackup requirements, routing constraints, via structures, and impedance targets for multi-layer high-speed designs* Drive lab correlation and validation activities, including TDR, VNA, and oscilloscope-based measurements, to verify simulation accuracy and characterize channel performance