System & IO Architect - Signal Integrity

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid family leave

Paid time-off

Paid holidays

Job summary

1000 Micron Technology, Inc. in Boise, Idaho is seeking an experienced signal integrity architect to define and evaluate architectural strategies for high-speed memory and system interfaces. Applicants should have over 10 years of experience in signal integrity design and a Bachelor's degree in Electrical Engineering or a related field.

The position offers a comprehensive benefits package including medical, dental, and vision plans, along with paid time-off and holidays. Join us to be part of an equal-opportunity workplace.

Qualifications

• 10+ years of experience in signal integrity or high-speed interface design.
• Strong hands-on SI modeling and simulation experience.
• Deep understanding of transmission lines, jitter, loss, and crosstalk.

Responsibilities

• Define SI architectural strategies for high-speed memory and system interfaces.
• Perform early feasibility and scaling analysis for future data rates.
• Build hands-on channel models across package, board, and system.
• Drive end-to-end SI co-design with IO, package, and system architects.
• Translate SI insights into electrical requirements and architectural constraints.

Skills

Signal integrity modeling

High-speed interface design

Electrical Engineering

Education

Bachelor’s degree in Electrical Engineering or related field

Job description

Job Overview

Micron Technology is a world leader in mem or & storage solutions that accelerate the transformation of information into intelligence. Our architecture team evaluates future interfaces early, using data‑driven analysis to guide product and IO strategy. This role focuses on early‑phase signal‑integrity (SI) architecture exploration, modeling, simulating, and assessing high‑speed interfaces, and translating findings into clear architectural intent and requirements.

Responsibilities

• Define SI architectural strategies for high‑speed memory and system interfaces.
• Perform early feasibility and scaling analysis for future data rates.
• Build hands‑on channel models across package, board, and system.
• Drive end‑to‑end SI co‑design with IO, package, and system architects.
• Translate SI insights into electrical requirements and architectural constraints.

Minimum Qualifications

• Bachelor’s degree or equivalent practical experience in Electrical Engineering or related field.
• 10+ years of experience in signal integrity or high‑speed interface design.
• Strong hands‑on SI modeling and simulation experience.
• Deep understanding of transmission lines, jitter, loss, and crosstalk.

Preferred Qualifications

• Master’s degree in a related technical field.
• Experience with memory interfaces or high‑speed IO standards.
• Background in architecture or pre‑silicon exploration roles.
• Strong communication of complex SI trade‑offs to leadership.

Benefits

Micron offers a comprehensive benefits package that includes medical, dental and vision plans, income protection programs, paid family leave, paid time‑off, and paid holidays. Eligible employees can choose plans that best meet their healthcare needs and budget. For additional details, see our Benefits Guide on micron.com/careers/benefits.

EEO Statement

Micron is proud to be an equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.