Principal, IO Design Engineering

Micron Technology, Inc; Boise (ID); On-site; USD 120,000 - 150,000; Full time

Job summary

Micron Technology, Inc is seeking a Principal IO Design Engineer in Boise, Idaho. You will innovate, design, optimize, and verify high-speed IO circuits for DRAM products. The role demands extensive experience in analog and mixed-signal circuit design.

Candidates should have strong technical communication skills and the ability to work collaboratively across various teams. Relocation assistance information is to be determined.

Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of experience in analog and mixed‑signal circuit design.
• Proficiency with UNIX and CADENCE design environment.
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices.
• Strong communication skills to convey technical concepts.
• Mental agility to work with various product types and teams.

Responsibilities

• Innovate, design, optimize and verify high‑speed IO and clocking circuits.
• Develop modeling, analysis and simulation methodology.
• Work with engineering teams to compare silicon performance with simulation results.
• Collaborate on Micron's next groundbreaking process node.

Skills

Analog circuit design

Mixed-signal circuit design

High-speed circuit optimization

Communication skills

Scripting languages (PERL/Python)

Education

MSEE + 10 years or BSEE + 12 years of experience

Tools

UNIX

CADENCE

Job description

Principal, IO Design Engineering

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan‑out of these high‑speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions.

Responsibilities

• Innovate, design, optimize and verify high‑speed IO and clocking circuits used in new DRAM products.
• Apply proven high‑speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level.
• Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full‑chip and system level.
• Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities.
• Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node.

Minimum Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed‑signal circuit design.
• Proficiency with UNIX and CADENCE design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices for high‑speed circuits to minimize parasitic impacts.
• Strong communication skills with the ability to convey sophisticated technical concepts to other design peers both verbally and written.
• Mental agility is a must for this position as we work with all product types (commodity, mobile, graphics) and product teams in parallel with silicon validation efforts.

Preferred Qualifications

• 7+ years of experience in high‑speed transmitter, receiver and clocking circuit design and optimization with proven silicon successes.
• Prior experience in channel modeling and characterization, transceiver noise and timing budget analysis, equalization techniques, SI knowledge, etc.
• Demonstrated ability in mentoring and coaching engineers early in their careers.
• Demonstrated ability with AI/ML usage and fluency in scripting languages such as PERL/Python.

Job Profile

Semiconductor Design Engineer 5

Relocation Level: TBD

Equal Opportunity Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.