Signal Integrity Architect – System & IO Architecture

Micron Technology, Inc; Boise (ID); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

Micron Technology, Inc in Boise, Idaho is looking for a Signal Integrity Architect to join their Systems Design Engineering team. The role focuses on defining architectural strategies for high-speed memory and system interfaces, requiring substantial experience in signal integrity and high-speed interface design.

Candidates should possess at least a Bachelor’s degree in Electrical Engineering and have more than 10 years of experience. A competitive salary range of $177,000 to $387,000 is offered along with robust benefits.

Qualifications

• 10+ years of experience in signal integrity or high-speed interface design.
• Hands-on experience with modeling and simulation.
• Deep understanding of jitter, loss, and crosstalk.

Responsibilities

• Define SI architectural strategies for high-speed memory and system interfaces.
• Perform feasibility and scaling analysis for future data rates.
• Drive end-to-end SI co-design with IO, package, and system architects.

Skills

Signal integrity modeling

High-speed interface design

Transmission lines understanding

Communication of technical concepts

Education

Bachelor’s degree in Electrical Engineering or related field

Master’s degree in a related technical field

Job description

Signal Integrity Architect – System & IO Architecture (Req ID: JR97120)

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The architecture team evaluates future interfaces early, using data‑driven analysis to guide product and IO strategy. This role focuses on early‑phase SI architecture exploration. You will independently model, simulate, and assess high‑speed interfaces and translate findings into clear architectural intent and requirements.

Responsibilities

• Define SI architectural strategies for high‑speed memory and system interfaces
• Perform early feasibility and scaling analysis for future data rates
• Build hands‑on channel models across package, board, and system
• Drive end‑to‑end SI co‑design with IO, package, and system architects
• Translate SI insights into electrical requirements and architectural constraints

Minimum Qualifications

• Bachelor’s degree or equivalent practical experience in Electrical Engineering or related field
• 10+ years of experience in signal integrity or high‑speed interface design
• Strong hands‑on SI modeling and simulation experience
• Deep understanding of transmission lines, jitter, loss, and crosstalk

Preferred Qualifications

• Master’s degree in a related technical field
• Experience with memory interfaces or high‑speed IO standards
• Background in architecture or pre‑silicon exploration roles
• Strong communication of complex SI trade‑offs to leadership

Job Profile(s)

Systems Design Engineering SMTS - Systems Design Engineering SMTS

Relocation Level

TBD

Compensation

$177,000.00 – $387,000.00 a year (US base salary range)

Additional compensation may include benefits, bonuses and equity.

Benefits

Micron offers a choice of medical, dental and vision plans enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.